B.E. (Tohoku University, Information Engineering) in 1997
M.S. (Tohoku University, Information Sciences) in 1999
Ph.D. (Tohoku University, Information Sciences) in 2001
04/1999--09/2001: Research Fellow of the Japan Society for
the Promotion of Science
10/2001--03/2009: Assistant Professor, Graduate School of Information Sciences, Tohoku University
04/2009--present: Associate Professor, Graduate School of Information Sciences, Tohoku University
11/2002--03/2006: PRESTO, Japan Science and Technology Agency (JST)
11/2006--07/2009: Power-Analysis Experiment WG Member, Cryptography Research
and Evaluation Committees (CRYPTREC), Japan
06/2009--03/2010: Visiting Professor at Telecom ParisTech, France
08/2009--03/2013: Cryptographic Implementation Committee Member (Chairman, 09/2011-03/2013), CRYPTREC, Japan
08/2009--03/2013: Side-Channel Security WG Member (Chairman, 09/2011-03/2013), CRYPTREC, Japan
09/2011--Present: Advisory Board Member for Cryptographic Technology, CRYPTREC, Japan
04/2013--Present: Cryptographic Technology Evaluation Committee Member, CRYPTREC, Japan
04/2013--Present: Lightweight Cryptography WG Member (Chairman, 04/2013-Present), CRYPTREC, Japan
Research interests: Computer arithmetic, EDA methodology, Algorithms and architectures for high-performance/secure VLSI computing
EGG Project
ARITH Project
Cryptographic Hardware Project
Publications
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