Publications


Papers

  • Naofumi Homma, Yu-ichi Hayashi, Noriyuki Miura, Daisuke Fujimoto, Makoto Nagata, and Takafumi Aoki, "Design Methodology and Validity Verification for a Reactive Countermeasure against EM Attacks," Journal of Cryptology, DOI:10.1007/s00145-015-9223-3 (in press)

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, "Efficient Electromagnetic Analysis for Cryptographic Module on the Frequency Domain," IEEJ Transactions on Fundamentals and Materials, Vol. 135, No. 9, pp. 515--521, September 2015. (in Japanese)

  • Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger, and Takafumi Aoki, "A Silicon-level Countermeasure against Fault Sensitivity Analysis and Its Evaluation," IEEE Transactions on Very Large Scale Integration Systems, Vol.23, No.8, pp.1429--1438 2015.

  • Hajime Uno, Sho Endo Naofumi Homma, Yu-ichi Hayashi, and Takafumi Aoki, "Electromagnetic Analysis against Public-Key Cryptographic Software on Embedded OS," IEICE Transactions on Communications, Vol.E98-B, No. 7, pp.1242-1249, July 2015.

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, "Fundamental Study on a Mechanism of Faulty Outputs from Cryptographic Modules due to IEMI," IEEJ Transactions on Fundamentals and Materials, Vol. 135, No. 5, pp. 276--281, May 2015. (in Japanese)

  • Rei Ueno, Naofumi Homma, and Takafumi Aoki, "Efficient DFA on SPN-Based Block Ciphers and Its Application to the LED Block Cipher," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E98-A, No. 1, pp. 182--191, January 2015.

  • Sho Endo, Naofumi Homma, Yu-ichi Hayashi, Junko Takahashi, Hitoshi Fuji, and Takafumi Aoki, "An Adaptive Multiple-fault Injection Attack on Microcontrollers and a Countermeasure," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E98-A, No. 1, pp. 171--181, January 2015.

  • Kazuya Saito, Naofumi Homma, and Takafumi Aoki, "A Formal Approach to Designing Multiple-Valued Arithmetic Circuits," Journal of Multiple-Valued Logic and Soft Computing, Vol. 24, No. 1-4, pp. 21--34, 2015.

  • Naofumi Homma, Kazuya Saito, and Takafumi Aoki, "Toward Formal Design of Practical Cryptographic Hardware Based on Galois Field Arithmetic," IEEE Transactions on Computers, Vol. 63, No. 10, pp. 2604--2613, 2014.

  • Kotaro Okamoto, Naofumi Homma, and Takafumi Aoki, "Formal design of arithmetic circuits over Galois fields based on normal basis representations," IEICE Transactions on Information and Systems, Vol.E97-D, No.9, pp.2270-2277, Sep. 2014.

  • Kazuo Sakiyama, Yang Li, Shigeto Gomisawa, Yu-ichi Hayashi, Mitsugu Iwamoto, Naofumi Homma, Takafumi Aoki, and Kazuo Ohta, "Practical DFA Strategy for AES Under Limited-Access Conditions," Journal of Information Processing Vol. 22, No. 2, pp. 142--151, 2014.

  • Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger, "Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage," IEICE Transactions on Electronics, Vol. E97-C, No. 4, pp. 272 --279, April 2014.

  • Takafumi Hibiki, Naofumi Homma, Yuto Nakano, Kazuhide Fukushima, Shinsaku Kiyomoto, Yutaka Miyake, and Takafumi Aoki "Chosen-IV Correlation Power Analysis on KCipher-2 Hardware and a Masking-based Countermeasure," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E97-A, No. 1, pp. 157--166, January 2014.

  • Laurent Sauvage, Jean-Luc Danger, Sylvain Guilley, Naofumi Homma, and Yuichi Hayashi, "Advanced Analysis of Faults Injected Through Conducted Intentional Electromagnetic Interferences," IEEE Transactions on Electromagnetic Compatibility, Vol. 55, No. 3, pp. 589--596, June 2013.

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, Laurent Sauvage, and Jean-Luc Danger, "Analysis of Electromagnetic Information Leakage from Cryptographic Devices with Different Physical Structures," IEEE Transactions on Electromagnetic Compatibility, Vol. 55, No. 3, pp. 571--580, June 2013.

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Haruki Shimada, Takafumi Aoki, Hideaki Sone, Laurent Sauvage, and Jean-Luc Danger, "Efficient Evaluation of EM Radiation Associated with Information Leakage from Cryptographic Devices," IEEE Transactions on Electromagnetic Compatibility, Vol. 55, No. 3, pp. 555--563, June 2013.

  • Yuichi Hayashi, Naofumi Homma, Takashi Watanabe, William O. Price, and William A. Radasky, "Introduction to the Special Section on Electromagnetic Information Security," IEEE Transactions on Electromagnetic Compatibility, Vol. 55, No. 3, pp. 539--546, June 2013.

  • Haruki Shimada, Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Efficient Safety Evaluation of EM Information Leakage Using a Selected-Data Set," IEICE Transactions B, Vol. J96-B, No.4, pp. 467-475, April 2013 (in Japanese).

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Transient IEMI Threats for Cryptographic Devices," IEEE Transactions on Electromagnetic Compatibility, Vol. 55, No. 1, pp. 140--148, February 2013.

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takeshi Sugawara, Yoshiki Kayano, Takafumi Aoki, Shigeki Minegishi, Akashi Satoh, Hideaki Sone, and Hiroshi Inoue, "Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current," IEICE Transactions on Electronics, Vol.E95-C,No.6,pp. 1089--1097, June 2012.

  • Miroslav Knezevic, Kazuyuki Kobayashi, Jun Ikegami, Shin'ichiro Matsuo, Akashi Satoh, Unal Kocabas, Junfeng Fan, Toshiro Katashita, Takeshi Sugawara, Kazuo Sakiyama, Ingrid Verbauwhede, Kazuo Ohta, Naofumi Homma, Takafumi Aoki, "Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates," IEEE Transactions on Very Large Scale Integration Systems, Vol. 20, No. 5, pp. 827--840, May 2012.

  • Naofumi Homma, Kazuya Saito, and Takafumi Aoki, "A Formal Approach to Designing Cryptographic Processors Based on GF(2^m) Arithmetic Circuits," IEEE Transactions on Information Forensics & Security, Vol. 7, No. 1, pp. 3--13, February 2012.

  • Sho Endo, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "A configurable on-chip glitchy-clock generator for fault injection experiments," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E95-A, No. 1 pp. 263--266, January 2012.

  • Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara,Naofumi Homma, and Takafumi Aoki, "Hardware Implementations of Hash Function Luffa," IPSJ Journal, Vol. 52, No. 12, pp. 3755--3765, December 2011. (Recommended paper) (in Japanese)

  • Sho Endo, Naofumi Homma, Takeshi Sugawara, Takafumi Aoki and Akashi, "An On-chip Glitchy-clock Generator for Testing Fault Injection Attacks," Journal of Cryptographic Engineering, Vol. 1, No. 4, pp. 265-270, December 2011.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "High-performance Architecture for Concurrent Error Detection for AES Processors," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E94-A, No.10, pp. 1971-1980, October 2011.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Systematic design of RSA processors based on high-radix Montgomery multipliers," IEEE Transactions on Very Large Scale Integration Systems, Vol. 19, No. 7, pp. 1136--1146, July 2011.

  • Yuichi Baba, Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki and Akashi Satoh, "Design and Evaluation of RSA Processor Generation System," IPSJ Journal, Vol. 51, No. 9, pp. 1847--1858, September 2010. (Recommended paper) (in Japanese)

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Profiling attack using multivariate regression analysis," IEICE Electronics Express, Vol. 7, No. 15, pp. 1139--1144, August 2010.

  • Naofumi Homma, Yuichi Baba, Atsushi Miyamoto, and Takafumi Aoki, "Multiple-Valued Constant-Power Adder and Its Application to Cryptographic Processor," IEICE Transactions on Information and Systems, Vol. E93-D, No. 8, pp. 2117-2125, August 2010.

  • Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, and Adi Shamir, "Comparative Power Analysis of Modular Exponentiation Algorithms," IEEE Transactions on Computers, Vol. 59, No. 6, pp. 795--807, June 2010.

  • Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Side Channel Attack on Cryptographic Modules and Its Security Evaluation," IEICE Transactions A, Vol. J93-A, No. 2, pp. 42--51, February 2010. (Invited paper) (in Japanese)

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Evaluation of Chosen-Message SPA Attacks against FPGA Implementations of RSA Processors," IEICE Transactions D, Vol. J92-D, No. 12, pp. 2168--2180, December 2009. (in Japanese)

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "High Scalable Circuit Architectures of the Hash Function Whirlpool," IPSJ Journal, Vol. 50, No. 11, pp. 2618--2632, November 2009. (in Japanese)

  • Naofumi Homma, Yuki Watanabe, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi, "Systematic approach to designing multiple-valued arithmetic circuits based on arithmetic description language," Journal of Multiple-Valued Logic and Soft Computing, Vol. 15, No. 4, pp. 329--340, 2009.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "A Systematic Approach for Designing Redundant Arithmetic Adders Based on Counter Tree Diagrams," IEEE Transactions on Computers, Vol. 57, No. 12, pp. 1633--1646, December 2008.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Arithmetic Circuit Verification Based on Symbolic Computer Algebra," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 10, pp. 3038--3046, October 2008.

  • Naofumi Homma, Sei Nagashima, Takeshi Sugawara, Takafumi Aoki, Akashi Satoh, "A high-resolution phase-based waveform matching and its application to side-channel attacks," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 1, pp. 193--202, January 2008.

  • Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi, "Design of multiple-valued arithmetic circuits using counter tree diagrams," Journal of Multiple-Valued Logic and Soft Computing, Vol. 13, No. 4-6, pp. 487--502, November 2007.

  • Masanori Natsui, Yoshiaki Tadokoro, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Synthesis of current mirrors based on evolutionary graph generation with transmigration capability," IEICE Electronics Express, Vol. 4, No. 3, pp. 88--93, January 2007.

  • Naofumi Homma, Yuki Watanabe, Takafumi Aoki, and Tatsuo Higuchi, "Formal Design of Arithmetic Circuits Based on Arithmetic Description Language," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No. 12, pp. 3500--3509, December 2006.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Systematic interpretation of redundant arithmetic adders in binary and multiple-valued logic," IEICE Transactions on Electronics, Vol. E89-C, No. 11, pp. 1645 --1654, November 2006.

  • Masanori Natsui, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Design of Multiple-Valued Logic Circuits Using Graph-Based Evolutionary Synthesis," Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, Nos. 5-6, pp. 519--544, August 2005.

  • Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Evolutionary synthesis of arithmetic circuit structures," Artificial Intelligence in Logic Design, Edited by S. N. Yanushkevich, Kluwer Academic Publishers, pp. 39--72, 2004 (Reprinted from Artificial Intelligence Review, Vol. 20, Nos. 3-4, 2003).

  • Naofumi Homma, Jun Sakiyama, Taihei Wakamatsu, Takafumi Aoki, and Tatsuo Higuchi, "Systematic Design of Redundant Adders Using Counter Tree Diagrams," IPSJ Journal, Vol. 45, No. 5, pp. 1279--1288, May 2004. (in Japanese)

  • Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Evolutionary synthesis of arithmetic circuit structures," Artificial Intelligence Review, Kluwer Academic Publishers, Vol. 20, Nos. 3-4, pp. 199--232, December 2003.

  • Jun Sakiyama, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Counter Tree Diagrams: A unified framework for analyzing fast addition algorithms," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 12, pp. 3009--3019, December 2003.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary graph generation system with transmigration capability and its application to arithmetic circuit synthesis," IEE Proceedings -Circuits, Devices and Systems, Vol. 149, No. 2, pp. 97--104, April 2002.

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshiki Terasaki, and Tatsuo Higuchi, "Graph-based evolutionary design of arithmetic circuits," IEEE Transactions on Evolutionary Computation, Vol. 6, No. 1, pp. 86--100, February 2002.

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma,。。and Tatsuo Higuchi, "Parallel Evolutionary Design of Constant-Coefficient Multipliers," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E85--A, No. 2, pp. 508-512, February 2002.

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "A pragmatic method for the design of fast constant-coefficient combinational multipliers," IEE Proceedings -Computers and Digital Techniques, Vol. 148, No. 6, pp. 196--206, November 2001.

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Evolutionary design for high-speed constant-coefficient multipliers," IEE Electronics Letters, Vol. 37, No. 4, pp. 256--258, February 2001.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary synthesis of fast constant-coefficient multipliers," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E83-A, No. 9, pp. 1767--1777, September 2000.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary graph generation system with symbolic verification for arithmetic circuit design," IEE Electronics Letters, Vol. 36, No. 11, pp. 937--939, May 2000.

  • Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Evolutionary design of arithmetic circuits," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E82-A, No. 5, pp. 798--806, May 1999.


Proceedings

  • Shoei Nashimoto, Naofumi Homma, Yu-Ichi Hayashi, and Takafumi Aoki, "Buffer Overflow Attack with Multiple Fault Injection and a Proven Countermeasure," Proceedings of 2015 PROOFS (Security Proofs for Embedded Systems) Workshop, September 17, 2015. (in press)

  • Rei Ueno, Naofumi Homma, Yukihiro Sugawara, Yasuyuki Nogami, and Takafumi Aoki, "Highly Efficient GF(2^8) Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design," Cryptographic Hardware and Embedded Systems - CHES 2015, Lecture Notes in Computer Science 9293, pp. 63--80, Springer-Verlag, September 14, 2015.

  • Ville Yli-Maeyry, Naofumi Homma, and Takafumi Aoki, "Improved Power Analysis on Unrolled Architecture and Its Application to PRINCE Block Cipher," Fourth International Workshop on Lightweight Cryptography for Security & Privacy - LightSec 2015, Lecture Notes in Computer Science, Springer-Verlag, September 11, 2015. (in press)

  • Atsushi Nagao, Yuichiro Okugawa, Kazuhiro Takaya, Yu-ichi Hayashi, Naofumi Homma, and Takafumi Aoki, "Detection Method for Overclocking by Intentional Electromagnetic Interference," 2015 Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe, pp. 241--245, August 18, 2015. (Best Paper Award Finalist)

  • Ko Nakamura, Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, "Method for Estimating Fault Injection Time on Cryptographic Devices from EM Leakage," 2015 Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe, pp. 235--240, August 18, 2015.

  • Noriyuki Miura, Naofumi Homma, Yuichi Hayashi, Takafumi Aoki, Daisuke Fujimoto, and Makoto Nagata "EM Attack Sensor: Concept, Circuit, and Design-Automation Methodology," Design Automation Conference 2015, Sun Francisco, No. 176, pp. 1--6, June 11, 2015. (Invited paper)

  • Yukihisa Sugawara, Rei Ueno, Naofumi Homma, and Takafumi Aoki, "System for Automatic Generation of Parallel Multipliers over Galois Field," 2015 IEEE 45th International Symposium on Multiple-Valued Logic, pp. 54--59, Waterloo, May 18, 2015. (Student Travel Award)

  • Rei Ueno, Naofumi Homma, Yukihisa Sugawara, and Takafumi Aoki, "Formal Design of Galois-Field Arithmetic Circuits Based on Polynomial Ring Representation," 2015 IEEE 45th International Symposium on Multiple-Valued Logic, pp. 48--53, Waterloo, May 18, 2015. (Student Travel Award)

  • Daisuke Fujimoto, Noriyuki Miura, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, and Makoto Nagata, "A DPA/DEMA/LEMA-Resistant AES Cryptographic Processor with Supply-Current Equalizer and Micro EM Probe Sensor," 2015 20th Asia and South Pacific Design Automation Conference, pp. 26-27, January 20, 2015.

  • Yu-ichi Hayashi, Naofumi Homma, Mamoru Miura, Takafumi Aoki and Hideaki Sone, "A Threat for Tablet PCs in Public Space: Remote Visualization of Screen Images Using EM Emanation," 21st ACM Conference on Computer and Communications Security (CCS), pp. 954--965, Nov. 2014.

  • Naofumi Homma, Yu-ichi Hayashi, Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Makoto Nagata, and Takafumi Aoki, "EM Attack Is Non-Invasive? - Design Methodology and Validity Verification of EM Attack Sensor," Cryptographic Hardware and Embedded Systems - CHES 2014, Lecture Notes in Computer Science 8731, pp. 1--16, Springer-Verlag, Sep. 2014. (Best Paper Award)

  • Naofumi Homma, Yu-ichi Hayashi, Toshihiro Katashita, and Hideaki Sone, "Development of Human Resources in Hardware Security through Practical Information Technology Education Program," IEEE International Symposium on Electromagnetic Compatibility, pp. 764--767, August 2014.

  • Noriyuki Miura, Daisuke Fujimoto, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, and Makoto Nagata, "Integrated-Circuit Countermeasures Against Information Leakage Through EM Radiation," IEEE International Symposium on Electromagnetic Compatibility, pp. 748--751, August 2014.

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Precisely Timed IEMI Fault Injection Synchronized with EM Information Leakage," IEEE International Symposium on Electromagnetic Compatibility, pp. 738--742, August 2014.

  • Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, and Makoto Nagata, "A Local EM-Analysis Attack Resistant Cryptographic Engine with Fully-Digital Oscillator-Based Tamper-Access Sensor," 2014 Symposium on VLSI Circuits, Digest of Technical Papers, pp. 172-173, June 2014. (Highlighted Paper)

  • Rei Ueno, Kotaro Okamoto, Naofumi Homma, and Takafumi Aoki, "An Efficient Approach to Verifying Galois-Field Arithmetic Circuits of Higher Degrees and Its Application to ECC Decoders," 2014 IEEE 44th International Symposium on Multiple-Valued Logic, pp. 144--149, Bremen, May 20, 2014.

  • Hajime Uno, Sho Endo, Yu-ichi Hayashi, Naofumi Homma, and Takafumi Aoki, "Chosen-message Electromagnetic Analysis against Cryptographic Software on Embedded OS," 2014 International Symposium on Electromagnetic Compatibility, Tokyo, pp. 313--316, May 14, 2014.

  • Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, and Jean-Luc Danger, " Correlation Power Analysis using Bit-Level Biased Activity Plaintexts against AES Cores with Countermeasures," 2014 International Symposium on Electromagnetic Compatibility, Tokyo, pp. 306--309, May 14, 2014.

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Efficient Method for Estimating Propagation Area of Information Leakage via EM Field," 2014 International Symposium on Electromagnetic Compatibility, Tokyo, pp. 298--301, May 14, 2014.

  • Kotaro Okamoto, Naofumi Homma, Takafumi Aoki and Sumio Morioka, "A Hierarchical Formal Approach to Verifying Side-channel Resistant Cryptographic Processors," 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 76-79, May 6, 2014.

  • Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, and Jean-Luc Danger, "Side-Channel Leakage on Silicon Substrate of CMOS Cryptographic Chip," 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 32-37, May 6, 2014. (Best Student Paper Award)

  • Sho Endo, Naofumi Homma, Yu-ichi Hayashi, Junko Takahashi, Hitoshi Fuji and Takafumi Aoki, "A Multiple-fault Injection Attack by Adaptive Timing Control under Black-box Conditions and a Countermeasure," International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2014), Lecture Notes in Computer Science, April 15, 2014. (in press)

  • Yang Li, Yu-Ichi Hayashi, Arisa Matsubara, Naofumi Homma, Takafumi Aoki, Kazuo Ohta and Kazuo Sakiyama, "Yet Another Fault-Based Leakage in Non-Uniform Faulty Ciphertexts," The 6th International Symposium on Foundations & Practice of Security, Lecture Notes in Computer Science 8352, pp. 272--290, February, 2014.

  • Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yuichiro Okugawa, and Yoshiharu Akiyama "Transient Analysis of EM Radiation Associated with Information Leakage from Cryptographic ICs," The 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2013), pp. 78--82, December 16, 2013.

  • Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, and Jean-Luc Danger "On-chip power noise measurements of cryptographic VLSI circuits and interpretation for side-channel analysis," EMC Europe 2013, pp. 405--410, September 4 2013.

  • Naofumi Homma, Yu-ichi Hayashi, and Takafumi Aoki, "Electromagnetic Information Leakage from Cryptographic Devices," EMC Europe 2013, pp. 401--404, September 4 2013.

  • Kotaro Okamoto, Naofumi Homma, and Takafumi Aoki, "A hierarchical graph-based approach to generating formally-proofed Galois-field multipliers," Proceedings of 2013 PROOFS (Security Proofs for Embedded Systems) Workshop, pp. 98--109, August 24, 2013.

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, "Map-based Analysis of IEMI Fault Injection into Cryptographic Devices," IEEE International Symposium on Electromagnetic Compatibility, pp. 829--833, August 2013.(Best Symposium Paper Award)

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, Laurent Sauvage, and Jean-Luc Danger, "Introduction to Recent Research on EM Information Leakage," The 2013 Asia-Pacific International Symposium and Exhibition on Electromagnetic Compatibility, pp. 233--236, May 21, 2013.

  • Kotaro Okamoto, Naofumi Homma, and Takafumi Aoki, "A graph-based approach to designing parallel multipliers over Galois fields based on normal basis representations," Proceedings of 43rd International Symposium on Multiple Valued Logic, pp. 158--163, May 21 2013.

  • Naofumi Homma, Yu-ichi Hayashi, Toshihiro Katashita, Yohei Hori, and Takafumi Aoki, "Towards Efficient Evaluation of EM Information Leakage from Cryptographic Devices," Proceedings of 22nd International Workshop on Post-Binary ULSI Systems, pp. 50--55, May 20, 2013.

  • Yang Li, Sho Endo, Nicolas Debande, Naofumi Homma, Takafumi Aoki, Thanh-Ha Le, Jean-Luc Danger, Kazuo Ohta, and Kazuo Sakiyama, "Exploring the Relations Between Fault Sensitivity and Power Consumption," International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2013), Lecture Notes in Computer Science 7864 (in press)

  • Takafumi Hibiki, Naofumi Homma, Takafumi Aoki, Yuto Nakano, Kazuhide Fukushima, Shinsaku Kiyomoto and Yutaka Miyake, "Chosen-IV Correlation Power Analysis on KCipher-2 and a Countermeasure," International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2013), Lecture Notes in Computer Science 7864, pp. 169--183, March, 2013.

  • Yongdae Kim, Naofumi Homma, Takafumi Aoki, and Heebong Choi, "Security Evaluation of Cryptographic Modules against Proling Attacks," Proceedins of the 15th International Conference on Information Security and Cryptology, Lecture Notes in Computer Science 7839, pp. 383--394, November 2012

  • Naofumi Homma and Takafumi Aoki, "Effective Data Processing and Protection Techniques for Community Network Nodes," Proceedings of the 15th International Symposium on Wireless Personal Multimedia Communications, pp. 571--572, September 2012.

  • Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta and Takafumi Aoki, "An Efficient Countermeasure against Fault Sensitivity Analysis using Configurable Delay Block," 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.95--102, September 2012.

  • Sho Endo, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Toshihiro Katashita, Yohei Hori, Kazuo Sakiyama, Makoto Nagata, Jean-Luc Danger, Thanh-Ha Le and Pirouz Bazargan Sabet, "Measurement of Side-Channel Information from Cryptographic Devices on Security Evaluation Platform: Demonstration of SPACES Project," SICE Annual Conference 2012, pp.313--316, August, 2012.

  • Haruki Shimada, Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Using Selected-Plaintext Sets for Efficient Evaluation of EM Information Leakage from Cryptographic Devices," SICE Annual Conference 2012, pp. 64-67, August, 2012.

  • Yu-ichi Hayashi, Naofumi Homma, Taishi Ikematsu, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, and Jean-Luc Danger, "An efficient method for estimating the area of information propagation through electromagnetic radiation," IEEE International Symposium on Electromagnetic Compatibility, pp. 800--805, August 2012.

  • Haruki Shimada, Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, Laurent Sauvage, and Jean-Luc Danger, "Efficient mapping of EM radiation associated with information leakage for cryptographic devices," IEEE International Symposium on Electromagnetic Compatibility, pp. 794--799, August 2012.

  • Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Naofumi Homma and Yu-ichi Hayashi, "A Fault Model for Conducted Intentional ElectroMagnetic Interferences," IEEE International Symposium on Electromagnetic Compatibility, pp. 788--793, August 2012.

  • Junko Takahashi, Yu-ichi Hayashi, Naofumi Homma, Hitoshi Fuji, and Takafumi Aoki, "Feasibility of Fault Analysis Based on Intentional Electromagnetic Interference," IEEE International Symposium on Electromagnetic Compatibility, pp. 782--787, August 2012.

  • Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki and Hideaki Sone, "A Threat of EM Information Leakage against Cryptographic Devices," 2012 Korea-Japan Joint Conference, pp.233-236, 2012.

  • Naofumi Homma, Kazuya Saito, and Takafumi Aoki, "Formal Design of Multiple-Valued Arithmetic Algorithms over Galois Fields and its Application to Cryptographic Processors," Proceedings of the 42nd International Symposium on Multiple Valued Logic, pp. 110--115, May 2012.

  • Kazuya Saito, Naofumi Homma, and Takafumi Aoki, "A Formal Approach to Designing Arithmetic Circuits over Galois Fields Using Symbolic Computer Algebra," Proceedings of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies, pp. 153--158, March 2012.

  • Yu-ichi Hayashi, Shigeto Gomisawa, Yang Li, Naofumi Homma, Kazuo Sakiyama, Takafumi Aoki, and Kazuo Ohta, "Intentional Electromagnetic Interference for Fault Analysis on AES Block Cipher IC," 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, pp. 235--240, November 2011.

  • Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Non-invasive Trigger-free Fault Injection Method Based on Intentional Electromagnetic Interference," NIST Non-Invasive Attack Testing Workshop, pp. 15--19, September 2011.

  • Taishi Ikematsu, Yu-ichi Hayashi, Takaaki Mizuki, Naofumi Homma, Takafumi Aoki, and Hideaki Sone,, "Suppression of Information Leakage from Electronic Devices Based on SNR," IEEE International Symposium on Electromagnetic Compatibility, pp. 920--924, August 2011.

  • Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, Yu-ichi Hayashi, and Naofumi Homma, "Identification of Information Leakage Points on a Cryptographic Device with an RSA Processor," IEEE International Symposium on Electromagnetic Compatibility, pp. 773--778, August 2011.

  • Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Naofumi Homma, and Yu-ichi Hayashi, "Practical Results of EM Cartography on a FPGA-based RSA Hardware Implementation," IEEE International Symposium on Electromagnetic Compatibility, pp. 768--772, August 2011.

  • Yu-ichi Hayashi, Naofumi Homma, Takeshi Sugawara, Takaaki Mizuki, Takafumi Aoki, and Hideaki Sone, "Non-Invasive EMI-Based Fault Injection Attack against Cryptographic Modules," IEEE International Symposium on Electromagnetic Compatibility, pp. 763--767, August 2011.

  • Kazuya Saito, Naofumi Homma and Takafumi Aoki, "A Graph-Based Approach to Designing Multiple-Valued Arithmetic Algorithms," Proceedings of the 41st International Symposium on Multiple Valued Logic, pp. 27--32, May 2011.

  • Olivier Meynard, Denis Real, Sylvain Guilley, Jean-Luc Danger, and Naofumi Homma, "Enhancement of Simple Electro-Magnetic Attacks by Pre-characterization in Frequency Domain and Demodulation Techniques," Design, Automation, and Test in Europe (DATE2011), pp. 1004--1009, March, 2011.

  • Sho Endo, Naofumi Homma, Takeshi Sugawara, Takafumi Aoki, and Akashi Satoh, "An On-Chip Glitchy-Clock Generator and its Application to Safe-Error Attack," International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2011), pp. 175--182, February, 2011.

  • Yu-ichi Hayashi, Takeshi Sugawara, Yoshiki Kayano, Naofumi Homma, Takaaki Mizuki, Akashi Satoh, Takafumi Aoki, Shigeki Minegishi, Hideaki Sone, Hiroshi Inoue, "Information Leakage from Cryptographic Hardware via Common-Mode Current," IEEE International Symposium on Electromagnetic Compatibility, pp. 109--114, July 2010.(Invited paper)

  • Masahiro Yamaguchi, Hideki Toriduka, Shoichi Kobayashi, Takeshi Sugawara, Naofumi Homma, Akashi Satoh, and Takafumi Aoki, "Development of an on-chip micro shielded-loop probe to evaluate performance of magnetic film to protect a cryptographic LSI from electromagnetic analysis," IEEE International Symposium on Electromagnetic Compatibility, pp. 103--108, July 2010.(Invited paper)

  • Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Electromagnetic Information Leakage for Side-Channel Analysis of Cryptographic Modules," IEEE International Symposium on Electromagnetic Compatibility, pp. 97--102, July 2010.(Invited paper)

  • Akashi Satoh, Toshihiro Katashita, Takeshi Sugawara, Takafumi Aoki and Naofumi Homma, "Hardware Implementations of Hash Function Luffa," IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 102--106, June 2010.

  • Yuichi Baba, Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, "Design of tamper-resistant registers for multiple-valued cryptographic processors," Proceedings of the 40th International Symposium on Multiple Valued Logic, pp. 67--72, May 2010.

  • Yongdae Kim, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "Biasing power traces to improve correlation in power analysis attacks," International Workshop on Constructive Side-Channel Analysis and Secure Design 2010, pp. 77--80, February 2010.

  • Takeshi Sugawara, Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, and Akashi Satoh, "Mechanism behind Information Leakage in Electromagnetic Analysis of Cryptographic Modules," Workshop on Information Security Applications - WISA 2009, Lecture Notes in Computer Science 5932, pp. 66--78, Springer-Verlag, 2009.

  • Masahiro Yamaguchi, Hideki, Toriduka, Shoichi Kobayashi, Takeshi Sugawara, Naofumi Homma, Akashi Satoh, Takafumi Aoki, "Side Channel Attack to Magnetic Near Field of Cryptographic LSI and Its Protection by Magnetic Thin Film," Soft Magnetic Materials 19, A3-11, September 2009.

  • Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara, Naofumi Homma, and Takafumi Aoki, "Development of Side-Channel Attack Standard Evaluation Environment," European Conference on Circuit Theory and Design 2009, pp. 403--408, August 2009.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Differential Power Analysis of AES ASIC Implementations with Various S-box Circuits," European Conference on Circuit Theory and Design 2009, pp. 395--398, August 2009.

  • Takeshi Sugawara, Yu-ichi Hayashi, Naofumi Homma, Takaaki Mizuki, Takafumi Aoki, Hideaki Sone, and Akashi Satoh, "Spectrum Analysis on Cryptographic Modules to Counteract Side-Channel Attacks," Proceedings of the 2009 International Symposium on Electromagnetic Compatibility, pp. 21--24, July 2009.

  • Yu-ichi Hayashi, Takeshi Sugawara, Yoshiki Kayano, Naofumi Homma, Takaaki Mizuki, Akashi Satoh, Takafumi Aoki, Shigeki Minegishi, Hideaki Sone, and Hiroshi Inoue, "An Analysis of Information Leakage from a Cryptographic Hardware via Common-Mode Current," Proceedings of the 2009 International Symposium on Electromagnetic Compatibility, pp. 17--20, July 2009.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Evaluation of Simple/Comparative Power Analysis Against an RSA ASIC Implementation", Proceedings of the 2009 IEEE International Symposium on Circuits and Systems, pp.2918--2921, May 2009.

  • Yuichi Baba, Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, "Multiple-Valued Constant-Power Adder for Cryptographic Processor," Proceedings of the 39th International Symposium on Multiple Valued Logic, pp. 239--244, May 2009.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "An experimental comparison of power analysis attacks against RSA processors on ASIC and FPGA," Proceedings of the 15th Workshop on Synthesis And System Integration of Mixed Information technologies, pp. 58--63, March 2009.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Compact ASIC Architectures for the 512-bit Hash Function Whirlpool," Workshop on Information Security Applications - WISA 2008, Lecture Notes in Computer Science 5379, pp. 28--40, Springer-Verlag, January 2009.

  • Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara, Naofumi Homma and Takafumi Aoki, "Enhanced Correlation Power Analysis using Key Screening Techniques," 2008 International Conference on ReConFigurable Computing and FPGAs, pp. 403-408, December 2008.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Systematic design of high-radix Montgomery multipliers for RSA processors," Proceedings of the 26th IEEE International Conference of Computer Design, pp. 416--421, October 2008.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Chosen-message SPA attacks against FPGA-based RSA hardware implementations," Proceedings of the 2008 International Conference on Field Programmable Logic and Applications, pp. 35--40, September 2008.

  • Akashi Satoh, Takeshi Sugawara, Naofumi Homma, and Takafumi Aoki, "High-performance concurrent error detection scheme for AES hardware," Cryptographic Hardware and Embedded Systems - CHES 2008, Lecture Notes in Computer Science 5154, pp. 100--112, Springer-Verlag, August 2008.

  • Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, and Adi Shamir, "Collision-based power analysis of modular exponentiation using chosen-message pairs," Cryptographic Hardware and Embedded Systems - CHES 2008, Lecture Notes in Computer Science 5154, pp. 15--29, Springer-Verlag, August 2008.

  • Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, and Akashi Satoh, "Power analysis of RSA processors with high-radix Montgomery multipliers," Proceedings of 17th International Workshop on Post-Binary ULSI Systems, pp. 21--24, May 2008.

  • Yuki Watanabe, Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, and Tatsuo Higuchi, "High-level design of multiple-valued arithmetic circuits based on arithmetic description language," Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic, No. 31, pp. 112--117, May 2008.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "Enhanced power analysis attack using chosen message against RSA hardware implementations," Proceedings of the 2008 IEEE International Symposium on Circuits and Systems, pp. 3282--3285, May 2008.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh, "High-performance ASIC implementations of the 128-bit block cipher CLEFIA," Proceedings of the 2008 IEEE International Symposium on Circuits and Systems, pp. 2925--2928, May 2008.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Arithmetic module generator with algorithm optimization capability," Proceedings of the 2008 IEEE International Symposium on Circuits and Systems, pp. 1796--1799, May 2008.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Formal representation and verification of arithmetic circuits using symbolic computer algebra," Proceedings of the 14th Workshop on Synthesis And System Integration of Mixed Information technologies, October 2007.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Application of symbolic computer algebra to arithmetic circuit verification," Proceedings of the 25th IEEE International Conference of Computer Design, October 2007.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "ASIC performance comparison for the ISO standard block ciphers," Proceedings of the 2nd Joint Workshop on Information Security, pp. 485--498, August 2007.

  • Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "A high-performance ASIC implementation of the 64-bit block cipher CAST-128," Proceedings of the 2007 IEEE International Symposium on Circuits and Systems, pp. 1859--1862, May 2007.

  • Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "SPA against an FPGA-based RSA implementation with a high-radix Montgomery multiplier," Proceedings of the 2007 IEEE International Symposium on Circuits and Systems, pp. 1847--1850, May 2007.

  • Sei Nagashima, Naofumi Homma, Takafumi Aoki, Akashi Satoh, "DPA using phase-based waveform matching against random-delay countermeasure," Proceedings of the 2007 IEEE International Symposium on Circuits and Systems, pp. 1807--1810, May 2007

  • Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, and Tatsuo Higuchi, "Algorithm-level optimization of multiple-valued arithmetic circuits using counter tree diagrams," Proceedings of the 37th IEEE International Symposium on Multiple-Valued Logic, No. 31, pp. 1--8, May 2007.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Formal Design of Decimal Arithmetic Circuits Using Arithmetic Description Language," 2006 IEEE International Symposium on Intelligent Signal Processing and Communication Systems, pp. 419--422, December 2006.

  • Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, and Akashi Satoh, "High-resolution side-channel attack using phase-based waveform matching," Cryptographic Hardware and Embedded Systems - CHES 2006, Lecture Notes in Computer Science 4249, pp. 187--200, Springer-Verlag, October 2006.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Algorithm-level interpretation of fast adder structures in binary and multiple-valued logic," Proceedings of the 36th International Symposium on Multiple-Valued Logic, p. 2, May 2006.

  • Yuki Watanabe, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Arithmatic module generator based on arithmatic description language," Proceedings of the 13th Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 153--160, April 2006.

  • Naofumi Homma, Yuki Watanabe, Kazuya Ishida, Takafumi Aoki, and Tatsuo Higuchi, "A multiplier module generator based on arithmetic description language," Proceedings of the IP Based SoC Design Conference & Exhibition, pp. 207--212, December 2005.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "A Graph-Based Representation for Analyzing Fast Addition Algorithms," Proceedings of the 7th International Symposium on Representations and Methodology of Future Computing Technologies, pp. 52--57, September 2005.

  • Naofumi Homma, Kazuya Ishida, Takafumi Aoki and Tatsuo Higuchi, "Arithmetic Description Language and Its Application to Parallel Multiplier Design," Proceedings of the 12th Synthesis And System Integration of Mixed Information technologies, pp. 319--326, October 2004.

  • Masanori Natsui, Naofumi Homma, Takafumi Aoki and Tatsuo Higuchi, "Topology-Oriented Design of Current Mirrors Using Evolutionary Graph Generation System," Proceedings of the 12th Synthesis And System Integration of Mixed Information technologies, pp. 78--84, October 2004.

  • Masanori Natsui, Naofumi Homma, Takafumi Aoki and Tatsuo Higuchi, "Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation," Parallel Problem Solving from Nature - PPSN VIII, Lecture Notes in Computer Science 3242, Springer-Verlag, pp. 342--351, September 2004.

  • Masanori Natsui, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary Graph Generation System with Transmigration Capability and Its Application to Current Mirror Circuit Synthesis," Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp 8A2L-3-1--8A2L-3-4, July 2004

  • Naofumi Homma, Taihei Wakamatsu, Jun Sakiyama, Takafumi Aoki, and Tatsuo Higuchi, "Counter Tree Diagrams for Redundant Adder Design," Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp 6C3L-2-1--6C3L-2-4, July 2004

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Multiplier Block Synthesis Using Evolutionary Graph Generation," The IEEE Computer Society Press in the proceedings of the 2004 NASA/DoD Conference on Evolvable Hardware, pp 79--82, June 2004

  • Naofumi Homma, Jun Sakiyama, Taihei Wakamatsu, Takafumi Aoki, and Tatsuo Higuchi, "A Systematic Approach for Analyzing Fast Addition Algorithms Using Counter Tree Diagrams," Proceedings of the 2004 IEEE International Symposium on Circuits and Systems, pp. V-197--V-200, May 2004

  • Kazuya Ishida, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH," Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic, pp. 334 -- 339, May 2004

  • Naofumi Homma, Masanori Natsui, Takafumi Aoki, and Tatsuo Higuchi, "Graph-Based Approach for Synthesizing Arithmetic Circuits," Proceedings of 13th International Workshop on Post-Binary ULSI Systems, pp. 25--32, May 2004. (Invited)

  • Masanori Natsui, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary Graph Generation System and Its Application MOS Current Mirror Synthesis," Proceedings of the 2003 IEEE International Symposium on Intelligent Signal Processing and Communication Systems, pp. 747--752, December 2003.

  • Naofumi Homma, Masanori Natsui, Takafumi Aoki, and Tatsuo Higuchi, "VLSI Circuit Design Using an Object-Oriented Framework of Evolutionary Graph Generation System," Proceedings of 2003 Congress on Evolutionary Computation, pp. 115--122, December 2003.

  • Naofumi Homma, Takafumi Aoki, Makoto Motegi and Tatsuo Higuchi, "A framework of evolutionary graph generation system and its application to circuit synthesis," Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, pp. V-201--V-204, May 2003.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary synthesis of circuit structures," Proceedings of 2002 International Symposium on New Paradigm VLSI Computing, pp. 48--51, December 2002.

  • Makoto Motegi, Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary Graph Generation System and Its Application to Bit-Serial Arithmetic Circuit Synthesis," Parallel Problem Solving from Nature - PPSN VII, Lecture Notes in Computer Science 2439, Springer-Verlag, pp. 831--840, September 2002.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Graph-based Individual Representation for Evolutionary Synthesis of Arithmetic Circuits," Proceedings of the 2002 Congress on Evolutionary Computation, pp. 1492--1497, May 2002.

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Design of constant-coefficient multipliers," Proceedings of 2001 4th International Conference on ASIC, Vol. 1, pp. 416--419, October 2001

  • Dingjun Chen, Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi, "Distributed evolutionary design of constant-coefficient multipliers," Proceedings of The 8th IEEE International Conference on Electronics, Circuits and Systems, Vol. 1, pp. 249--252, September 2001

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary graph generation system with transmigration capability for arithmetic circuit design," Proceedings of The 2001 IEEE International Symposium on Circuits and Systems, Vol. 5 of 5, pp. 171--174, May 2001.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary generation of constant-coefficient multipliers," Proceedings of the 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems, pp. 481--484, December 1999.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "A new evolutionary approach for synthesizing circuit structures," Proceedings of the 1999 International Symposium on Nonlinear Theory and its Applications, pp. 239--242, November 1999.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Evolutionary graph generation system for arithmetic circuit design," Proceedings of International Symposium on Future of Intellectual Integrated Electronics, pp. 355--364, March 1999.

  • Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, "Design of arithmetic circuits based on evolutionary graph generation," Proceedings of the Workshop on Synthesis and System Integration of Mixed Technologies, pp. 31--38, October 1998.


Proceedings (in Japanese)

  • 藤本大介,照屋唯紀,崎山 一男,本間尚文,池田 誠,永田 真,松本 勉,"並列化RNSアーキテクチャによる高速ペアリング実装に関する検討," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F3-4, pp.1--8, January 20, 2016.

  • 上野嶺,菅原幸弘,本間尚文,青木孝文,森岡澄夫, "一般化マスキングスキームに基づく耐タンパー性暗号ハードウェアの自動合成," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F3-4, pp.1--8, January 20, 2016.

  • 河井航,上野嶺,本間尚文,青木孝文,福島和英,清本晋作, "ICカード上に実装されたKCipher-2ソフトウェアに対する電力解析の検討," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F3-1, pp.1--6, January 20, 2016.

  • 林優一,本間尚文,鳥海陽平,高谷和宏,青木孝文,"電磁的画面盗視における漏えいパラメタの高速推定法に関する検討," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F2-2, pp.1--5, January 20, 2016.

  • 石幡大輔,本間尚文, 林優一, 三浦典之, 藤本大介, 永田真, 青木孝文,"電磁波解析攻撃に対する反応型対策の高性能化とその評価," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F2-1, pp.1--6, January 20, 2016.

  • 梨本翔永, 本間尚文, 林優一, 高橋順子,冨士仁,青木孝文, "パイプライン構造を有するマイクロプロセッサへの故障注入攻撃," 2016 年暗号と情報セキュリティシンポジウム, Vol. 2F1-3, pp.1--7, January 20, 2016.

  • ヴィッレウリマウル, 本間尚文, 青木孝文, "アンロールドアーキテクチャに対する電力解析の高度化手法," 2016 年暗号と情報セキュリティシンポジウム, Vol. 1F2-4, pp.1--6, January 19, 2016.

  • 上野嶺,本間尚文,菅原幸弘,野上保之,青木孝文,"冗長表現に基づく高効率ガロア体算術演算回路の設計," 第29回多値論理とその応用研究会, No. 4, pp. ??--??, January 9 2016.

  • 菅原幸弘, 上野嶺, 本間尚文, 青木孝文, "マルチパーティ計算に基づく暗号ハードウェアの形式的設計に関する検討," 第38回多値論理フォーラム, No. 11, pp. 11-1--11-6, September 13, 2015.

  • 石幡大輔, 本間尚文, 林優一, 三浦典之, 藤本大介, 永田真, 青木孝文,"暗号LSIへの実装攻撃に対する反応型対策の高精度化に関する検討," 平成27年度 電気関係学会東北支部連合大会,No. 2E01, p. 1, August 28, 2015

  • 河井航,本間尚文,福島和英,清本晋作,青木孝文,"ストリーム暗号ソフトウェアに対する能動的物理攻撃の評価," 平成27年度 電気関係学会東北支部連合大会,No. 2C14, p. 1, August 28, 2015

  • 田中廉大,三浦典之,藤本大介,本間尚文,林優一,青木孝文,永田真, "暗号処理回路への近傍電磁波解析攻撃を検知する完全デジタル発振器型センサ," LSIとシステムのワークショップ,p. 9, May 11, 2015.(優秀ポスター賞受賞)

  • 遠藤翔, 梨本翔永, 本間尚文, 林優一, 高橋順子, 冨士仁, 青木孝文, "Cortex-M0プロセッサ上の暗号ソフトウェアに対する多重故障注入攻撃の検討," 情報処理学会研究報告, Vol. 2015-CSEC-68, No. 15, pp. 1--8, March 5, 2015.

  • 長尾篤, 奥川雄一郎, 高谷和宏, 林優一, 本間尚文, 青木孝文, "意図的な電磁妨害波によって発生するオーバークロックの検出方法に関する検討," 電子情報通信学会技術研究報告, vol.114, no. 398, EMCJ2014-100 pp.83-88, January 23, 2015.

  • ヴィッレウリマウル, 本間尚文, 遠藤翔, 青木孝文, "アンロールアーキテクチャで実装されたPRINCEハードウェアに対する電力解析の検討," 2015 年暗号と情報セキュリティシンポジウム, Vol. 3A2-4, pp.1--6, January 22, 2015.

  • 本間尚文, 林優一, 三浦典之, 藤本大介, 永田真, 青木孝文, "電磁波攻撃センサの設計と実証," 2015 年暗号と情報セキュリティシンポジウム, Vol. 2F4-4, pp.1--6, January 21, 2015.

  • 林優一, 本間尚文, 三浦衛, 青木孝文, 曽根秀昭, "タブレット端末からの電磁波を介した情報漏えいメカニズムの検討," 2015 年暗号と情報セキュリティシンポジウム, Vol. 2F4-3, pp.1--5, January 21, 2015.

  • 梨本翔永, 遠藤翔, 本間尚文, 林優一, 青木孝文, "マイクロコントローラ上のプログラム制御フローへの故障注入攻撃," 2015 年暗号と情報セキュリティシンポジウム, Vol. 2F4-2, pp.1--8, January 21, 2015.

  • 中村紘, 林優一, 水木敬明, 本間尚文, 青木孝文, 曽根秀昭, "暗号モジュールからの漏洩電磁波を用いた故障発生タイミング特定手法," 2015 年暗号と情報セキュリティシンポジウム, Vol. 2F4-1, pp.1--8, January 21, 2015.

  • 上野嶺, 本間尚文, 菅原幸弘, 青木孝文, "多項式環表現を用いたGF(2^8)合成体逆元演算器の設計," 2015 年暗号と情報セキュリティシンポジウム, Vol. 2B1-1, pp.1--6, January 21, 2015.

  • 宇野甫, 遠藤翔, 本間尚文, 青木孝文, 仲野有登, 清本晋作, 三宅優, "KCipher-2ソフトウェアのICカード実装とその評価,"コンピュータセキュリティシンポジウム 2014, pp. 64--71, October 22, 2014.

  • 上野嶺,本間尚文,菅原幸弘,青木孝文,"多項式環表現されたガロア体上の算術演算回路の形式的設計に関する検討,"第37回多値論理フォーラム, No. 14, pp. 15-1--15-8, September 14, 2014.

  • 菅原幸弘,上野嶺,本間尚文,青木孝文,"ガロア体上の並列乗算器自動生成システムの構築とその評価,"第37回多値論理フォーラム, No. 14, pp. 14-1--14-7, September 14, 2014.

  • 菅原幸弘,上野嶺,本間尚文,青木孝文,"共通鍵暗号プロセッサの効率的な検証システムの構築," 平成26年度 電気関係学会東北支部連合大会,No. 2G06, p. 1, August 22, 2014.

  • 梨本翔永,宇野 甫,本間尚文,青木孝文,"サイドチャネル攻撃耐性を有する楕円曲線暗号ソフトウェアのICカード実装," 平成26年度 電気関係学会東北支部連合大会,No. 2G05, p. 1, August 22, 2014.

  • 中村紘, 林優一, 本間尚文, 水木敬明, 青木孝文, 曽根 秀昭, "サイドチャネル情報を用いた故障発生タイミング特定手法の実現可能性に関する検討," 電子情報通信学会技術研究報告, vol. 114, no. 129, EMCJ2014-23, pp. 37-42, 2014.

  • 中村紘, 林優一, 本間尚文, 水木敬明, 青木孝文, 曽根 秀昭, "暗号モジュールにおけるサイドチャネル情報を用いた故障発生タイミング特定手法," 電子情報通信学会技術研究報告, vol. 114, no. 93, EMCJ2014-11, pp. 7-12, 2014.

  • 藤本大介, 三浦典之, 永田真, 林優一, 本間尚文, Shivam Bhasin,Jean-Luc Danger, "CMOS暗号回路におけるシリコン基板からのサイドチャネル漏洩," 電子情報通信学会技術研究報告, vol. 114, no. 93, EMCJ2014-10, pp. 1-6, 2014.

  • 宇野甫, 遠藤翔, 本間尚文, 青木孝文, 仲野有登, 清本晋作, 三宅優, "ZigBee評価用マイコン上に実装されたKCipher-2に対する相関電磁波解析の検討," 信学技報, ISEC2013-88, pp. 35-40, March 10, 2014.

  • 宇野甫,遠藤翔,本間尚文, 林優一, 青木孝文, "組込みOS上に実装された公開鍵暗号ソフトウェアに対する電磁波解析攻撃," 2014 年暗号と情報セキュリティシンポジウム, Vol. 3A2-3, pp.1--7, January 23, 2014.

  • 上野嶺, 本間尚文, 青木孝文, "LED 暗号への単一の故障注入を用いた差分故障解析とその評価," 2014 年暗号と情報セキュリティシンポジウム, Vol. 3A1-5, pp.1--8, January 23, 2014.

  • 遠藤翔, 本間尚文, 林優一, 高橋順子, 冨士仁, 青木孝文, "適応的にタイミングを制御した多重故障注入攻撃とその対策," 2014 年暗号と情報セキュリティシンポジウム, Vol. 3A1-1, pp.1--7, January 23, 2014.

  • 林優一, 本間尚文, 三浦衛,青木孝文, 曽根 秀昭, "タブレット端末に対する電磁波を介した情報漏えいの脅威," 2014 年暗号と情報セキュリティシンポジウム, Vol. 2A3-4, pp.1--6, January 22, 2014.

  • 藤本大介, 田中大智, 三浦典之, 永田真, 林優一, 本間尚文, 青木孝文, 堀洋平, 片下敏広, 山一男, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger, "チップ内外での電源電圧取得によるサイドチャネル漏洩情報の一考察," 2014 年暗号と情報セキュリティシンポジウム, Vol. 2A3-3, pp.1--6, January 22, 2014.

  • 岡本広太郎, 本間尚文, 青木孝文, "多様なガロア体上の算術演算に基づく暗号プロセッサの形式的設計手法," 2014 年暗号と情報セキュリティシンポジウム, Vol. 1A3-4, pp.1--8, January 21, 2014.

  • 林優一, 本間尚文, 片下敏宏, 曽根 秀昭, "実践的情報教育を通じたハードウェアセキュリティ人材の育成," 電子情報通信学会技術研究報告, vol. 113, no. 342, ISEC2013-78, pp. 33-37, 2013.

  • 小林瑞樹,林優一,本間尚文,水木敬明,青木孝文,曽根秀昭,"漏えい電磁情報を用いた任意の処理への非侵襲な故障注入手法,"2013 年電子情報通信学会基礎・境界ソサイエティ大会,A-7-5, p. 101, September 18, 2013.

  • 上野嶺,岡本広太郎, 本間尚文, 青木孝文, "ガロア体算術回路グラフに基づく誤り訂正回路の形式的検証に関する検討," 第36回多値論理フォーラム, No. 10, pp. 10-1--10-7, September 14, 2013.

  • 上野嶺,岡本広太郎, 本間尚文, 青木孝文,"誤り訂正符号化回路の形式的設計とその評価,"平成25年度 電気関係学会東北支部連合大会,No. 2F24, p. 211, August 23, 2013.

  • 宇野甫,遠藤翔,本間尚文, 青木孝文,"AndroidOS 上に実装されたRSA ソフトウェアに対する電磁セキュリティ解析,"平成25年度 電気関係学会東北支部連合大会,No. 2F20, p. 207, August 23, 2013.

  • 嶋田晴貴,林優一, 本間尚文, 水木敬明,青木孝文, 曽根秀昭, "暗号モジュールへの妨害波注入時の磁界分布可視化に関する検討,"電子情報通信学会総合大会, B-4-59, p.404, 2013.

  • 三浦 衛,本間尚文,畑 雅之,片桐 寛,青木孝文, "災害時の情報収集のための単眼カメラを用いた入力システムの検討," 第75回情報処理学会全国大会, 5J-1, 4-531-4-532, March 8, 2013

  • 岡本広太郎,本間尚文,青木孝文,"ガロア体上の乗算器モジュールジェネレータの構築," 第75回情報処理学会全国大会, 3K-8,1-135-1-136,March 7, 2013.

  • ヴィッレ ウリマウル,遠藤 翔,本間尚文,青木孝文,"LED暗号ハードウェアに対する相関電力解析とその対策," 第75回情報処理学会全国大会, 2Z-9,3-533-3-534,March 6, 2013.

  • 林優一, 本間尚文, 水木敬明, 青木孝文, 曽根秀昭,"漏えい情報を用いて注入タイミングを制御可能な遠方からの故障注入手法," 2013 年暗号と情報セキュリティシンポジウム, Vol. 3E4-3, pp.1--6, January 24, 2012.

  • 遠藤翔, 李陽, 本間尚文, 崎山一男, 藤本大介, 永田真, 太田和夫, 青木孝文,"故障感度隠蔽のための効率的な対策とその評価," 2013 年暗号と情報セキュリティシンポジウム, Vol. 1E1-5, pp.1--8, January 22, 2012.

  • 響崇史, 本間尚文, 青木孝文, 仲野有登, 福島和英, 清本晋作, 三宅優, "KCipher-2への電力解析攻撃対策とその評価," コンピュータセキュリティシンポジウム 2012, pp. 749--756, November 1, 2012.

  • 多田成宏, 林優一, 本間尚文,水木敬明,青木孝文,曽根秀昭, "意図的な電磁妨害によるフォールト発生メカニズムに関する基礎的検討," 電気学会研究会資料, EMC-12-33, pp. 83-86, October 26, 2012.

  • 岡本広太郎, 本間尚文, 青木孝文, "正規基底表現されたガロア体上の算術演算回路の形式的設計に関する検討," 第35回多値論理フォーラム, No. 7, pp. 7-1--7-6, September 15, 2012.

  • 岡本広太郎, 本間尚文, 青木孝文, "ガロア体上の算術演算回路の自動生成システムの構築," 平成24年度 電気関係学会東北支部連合大会,No. 1I03, pp. 115, August 30, 2012.

  • 林優一, 本間尚文,水木敬明,青木孝文,曽根秀昭, "意図的な電磁妨害による暗号モジュールへの故障注入メカニズムに関する検討," 電気学会研究会資料, EMC-12-10, pp. 23-27, June 22, 2012.

  • 林優一, 水木敬明,本間尚文,曽根秀昭, 青木孝文,"周波数領域における電磁波解析の効率化に関する検討,"電磁環境研究会, EMC-12-003, pp. 13-18, March 21, 2012.

  • 齋藤和也, 本間尚文, 青木孝文, "ガロア体上の算術演算回路の形式的設計とそのAES暗号プロセッサへの応用," 2012年暗号と情報セキュリティシンポジウム, Vol. 4C1-4, pp.1--8, February 2, 2012.

  • 林優一, 水木敬明, 本間尚文, 曽根秀昭, 青木孝文, "暗号機器上のサイドチャネル情報取得性分布図作成の効率化の検討," 2012年暗号と情報セキュリティシンポジウム, Vol. 3C2-1, pp.1--7, February 1, 2012.

  • 響崇史, 齋藤和也, 本間尚文, 青木孝文, 仲野有登, 福島和英, 清本晋作, 三宅優, "KCipher-2 に対する相関電力解析とその対策," 2012年暗号と情報セキュリティシンポジウム, Vol. 3C1-2, pp.1--8, February 1, 2012

  • 齋藤和也, 本間尚文, 青木孝文, "ガロア体上の算術演算回路の形式的表現に関する検討," 第25回多値論理とその応用研究会, No. 8, pp. 38--44, January 7 2012.

  • 池松大志、林優一、水木敬明、本間尚文、曽根秀昭、青木孝文, "情報機器からの電磁的情報漏洩における取得性予測に関する検討," 環境電磁研究会, EMC-11-32, pp. 23--28, December 9, 2011.

  • 嶋田晴貴, 林優一, 水木敬明, 本間尚文, 曽根秀昭, 青木孝文, "情報機器における放射電磁界分布と電磁的情報漏洩に関する基礎的検討," 環境電磁研究会, EMC-11-23, pp. 23-27, 2011.

  • 林優一, 本間尚文, 水木敬明, 青木孝文, 曽根秀昭, "暗号モジュールに対する意図的な電磁妨害に関する検討," 2011年電子情報通信学会ソサイエティ大会,B-4-58, September 13, 2011.

  • 齋藤 和也,本間 尚文,青木 孝文, "算術回路グラフの暗号プロセッサ設計への応用," 第34回多値論理フォーラム, No. 11, pp. 11-1--11-6, September 18, 2011.

  • 響崇史, 齋藤和也, 本間尚文, 青木孝文, "ストリーム暗号KCipher-2のハードウェア実装評価," 平成23年度 電気関係学会東北支部連合大会,No. 2C25, pp. 115, August 26, 2011.

  • Sho Endo, Naofumi Homma and Takahumi Aoki, "Efficient countermeasure against fault injection attacks on modular," 平成23年度 電気関係学会東北支部連合大会,No. 1A03, pp. 3, August 25, 2011.

  • 林優一, 菅原健, 本間尚文,水木敬明,青木孝文,曽根秀昭, "意図的な電磁妨害による暗号モジュールへの故障注入に関する検討,"電磁環境研究会, EMC-11-17, pp. 53-57, June 24, 2011.

  • 林優一, 池松大志,水木敬明, 本間尚文,青木孝文, 曽根秀昭, "SNRに基づいた電子機器からの情報取得性に関する基礎的検討," 電磁環境研究会, EMC-11-002, pp.5-10, March 24, 2011

  • 林優一, 菅原健, 本間尚文, 水木敬明, 青木孝文, 曽根秀昭, "電磁波を用いた電源線からのフォールト攻撃," 2011年暗号と情報セキュリティシンポジウム, Vol. 3D3-4, pp.1--6, January 27, 2011.

  • 遠藤翔, 本間尚文, 菅原健, 青木孝文, 佐藤証, "べき乗剰余演算に対する故障注入を用いた電力解析攻撃," 2011年暗号と情報セキュリティシンポジウム, Vol. 1D2-5, pp.1--6, January 25, 2011.

  • 遠藤翔, 本間尚文, 菅原健, 青木孝文, "暗号プロセッサの故障解析システムに関する検討," 第24回多値論理とその応用研究会, No. 11, pp. 11-1-11-4, January 9 2011.

  • 齋藤和也, 本間尚文, 青木孝文, "算術回路グラフに基づく算術演算回路の形式的設計に関する検討," 第24回多値論理とその応用研究会, No. 8, pp. 8-1-8-6, January 8 2011.

  • 齋藤和也, 本間尚文, 青木孝文 "多値算術演算回路向け算 術アルゴリズムの形式的表現と検証に関する検討," 第33回 多値論理フォーラム, No. 8, pp. 8-1--8-6, September 2010.

  • ファジャル メガ プラタマ, 本間尚文, 青木孝文, 山口隆 弘, 出川勝彦, 秋田隆之, "重複帯域の位相情報を利用した 広帯域信号計測法の評価," 平成22年度 電気関係学会東北 支部連合大会, No. 1H14, p. 262, August 2010

  • 齋藤和也, 菅原 健, 本間尚文, 青木孝文, 佐藤証, " 楕円 曲線暗号ハードウェアの電力解析による安全性評価," 平成 22年度 電気関係学会東北支部連合大会, No. 1E08, p. 143, August 2010

  • 佐藤証, 片下敏宏, 菅原健, 本間尚文, 青木孝文, "ハッシュ関数Luffaのハードウェア実装," マルチメディア,分散,協調とモバイル (DICOMO2010) シンポジウム, No. 7F-1, pp. 1660--1665, July 2010.

  • 林 優一, 菅原 健, 池松 大志, 本間 尚文, 水木 敬明, 青 木 孝文, 曽根 秀昭"暗号機器の物理形状を考慮したサイ ドチャネル情報の評価," 2010年暗号と情報セキュリティ シンポジウム, Vol. 3B1-4, pp.1--6, January 2010.

  • 金 用大, 菅原 健, 本間 尚文,青木 孝文, 佐藤 証, "偏ら せた波形セットを用いた電力解析攻撃の高精度化," 2010年 暗号と情報セキュリティシンポジウム, Vol. 3B1-5, pp.1--6, January 2010.

  • 菅原 健, 本間 尚文, 林 優一, 水木 敬明, 青木 孝文, 曽 根 秀昭, 佐藤 証, "変調されたサイドチャネル信号の周波 数領域での電力解析," 2010年暗号と情報セキュリティシン ポジウム, Vol. 3B1-4, pp.1--6, January 2010.

  • 金用大, 菅原健, 林優一, 本間尚文, 青木孝文, 佐藤証," 重回帰分析を用いたサイドチャネル攻撃の高精度化,"コン ピュータセキュリティシンポジウム 2009, pp. 649--654, October 2009.

  • 馬場祐一,宮本篤志,本間尚文,青木孝文,""電流モード 多値論理を用いた暗号ハードウェアの安全性に関する検討, "第32回多値論理フォーラム, No. 3, pp. 3-1--3-6, September 2009.

  • 菅原健, 林優一, 本間尚文, 水木敬明,青木孝文,曽根秀 昭, 佐藤証, "周波数領域での暗号モジュールの電力解析, "第8回情報科学技術フォーラム (FIT2009), No. L-007, pp. 142--145, September 2009.

  • ファジャル メガ プラタマ,宮澤一之,本間尚文,青木孝 文,""帯域分割法に基づく広帯域信号計測," 第8回 情報科 学技術フォーラム (FIT2009), No. C-039, pp. 527--534, September 2009.

  • 金用大,菅原健,本間尚文,青木孝文,佐藤証, "AES のハー ドウェア実装に対するテンプレート攻撃," 第8回 情報科学 技術フォーラム (FIT2009), No. L-008, pp. 139--146, September 2009.

  • 馬場祐一,宮本篤志,本間尚文,青木孝文,佐藤証,"RSA 暗号プロセッサジェネレータの設計と評価," 第8回情報科 学技術フォーラム(FIT2009), No. RC-003, pp. 129--136, September 2009.

  • 鳥塚 英樹,山口 正洋,菅原 健,本間 尚文,佐藤 証,青 木 孝文,"オンチップ集積化マイクロ磁界プローブを用い た暗号LSI の近傍磁界計測," 電子通信学会環境電磁工学 研究会,Vol. 108, No. 482, pp. 37-42, March, 2009.

  • 片下 敏宏,佐藤 証,菅原 健,本間尚文,青木孝文, "CPAに対するデカップリングキャパシタの影響の予備検証, " 2009年暗号と情報セキュリティシンポジウム, Vol. 3A4-2, pp.1--6, January 2009.

  • 菅原 健,鳥塚 英樹,本間尚文,佐藤証,青木孝文,山口 正洋"最近傍から計測した磁界を用いた差分電磁波解析," 2009年暗号と情報セキュリティシンポジウム, Vol. 3A1-5, pp.1--6, January 2009.

  • 宮本篤志,本間尚文,青木孝文,佐藤証,"べき乗剰余演算 に対する比較電力解析の応用," 2009年暗号と情報セキュ リティシンポジウム, Vol. 2A1-2, pp.1--6, January 2009.

  • 本間尚文,宮本篤志,菅原健,青木孝文,佐藤証,"サイド チャネル攻撃評価用ISO/IEC標準暗号プロセッサの開発," 2009年暗号と情報セキュリティシンポジウム, Vol. 2A1-1, pp.1--6, January 2009.

  • 菅原健,本間尚文,青木孝文,佐藤証,"標準評価基板上の ASICへの差分電力解析実験,"コンピュータセキュリティシ ンポジウム 2008, D5-3, October 2008.

  • 林優一,菅原健,本間尚文,水木敬明,青木孝文,曽根秀 昭,佐藤 証,"電源ライン上の漏洩情報を用いたサイドチャ ネル攻撃,"コンピュータセキュリティシンポジウム 2008, D5-2, October 2008.

  • 片下敏宏,佐藤証,菅原健,本間尚文,青木孝文,"鍵候補 の篩い分けによるCPAの高速化と鍵推定精度の向上,"コン ピュータセキュリティシンポジウム 2008, D5-1, October 2008.

  • 馬場祐一,宮本篤志,本間尚文,青木孝文,佐藤証,"高基数モンゴメリ乗算に基づくRSA暗号の高性能ハードウェア実装,"平成20年度電気関係学会東北支部連合大会,No. 1F07, p. 198, August 2008.

  • 佐藤証, 菅原健,本間尚文,青木孝文,"ブロック暗号AESの高性能エラー検出回路方式, "マルチメディア,分散,協調とモバイル (DICOMO2008) シンポジウム, No. 3A-3, pp. 498 - 505, July 2008.

  • 菅原健, 本間尚文, 青木孝文, 佐藤証, "シフトレジスタ・アーキテクチャによるハッシュ関数Whirlpoolの高性能回路実装, "マルチメディア,分散,協調とモバイル (DICOMO2008) シンポジウム, No. 3A-2, pp. 490 - 497, July 2008.

  • 宮本篤志, 本間尚文, 青木孝文, 佐藤証, "特定入力ペアを用いたRSA暗号に対する電力解析攻撃の実験的評価, "マルチメディア,分散,協調とモバイル (DICOMO2008) シンポジウム, No. 3A-1, pp. 482 - 489, July 2008.

  • 渡邉 裕樹,本間 尚文,出川 勝彦,青木 孝文,樋口 龍雄, "算術アルゴリズム記述言語に基づく多値論理回路の設計," 第21回 回路とシステム軽井沢ワークショップ, pp. 237--242, April 2008.

  • 宮本篤志,本間尚文,青木孝文,佐藤証,"高基数モンゴメ リ乗算に基づくスケーラブルRSA暗号プロセッサの設計," 2008年暗号と情報セキュリティシンポジウム, Vol. 2C3-3, pp.1-6, January 2008.

  • 菅原健, 本間尚文, 青木孝文, 佐藤証,"ハッシュ関数 Whirlpool の小型ハードウェア・アーキテクチャ," 2008 年暗号と情報セキュリティシンポジウム, Vol. 2C3-1, pp.1-6, January 2008.

  • 本間尚文,宮本篤志,青木孝文,佐藤証,"RSA暗号に対す る平文選択型電力解析攻撃の検討," 2008年暗号と情報セ キュリティシンポジウム, Vol. 1A1-5, pp.1-6, January 2008.

  • 宮本 篤志,本間 尚文,青木 孝文,佐藤 証,"RSA暗号に 対する平文選択型SPAの実験的評価," コンピュータセキュ リティシンポジウム 2007, pp. 649--654, November 2007.

  • 菅原健,本間尚文,青木孝文,佐藤証,"128ビットブロッ ク暗号CLEFIAのASIC実装," コンピュータセキュリティシン ポジウム 2007, pp. 175--180, October 2007.

  • 渡邉裕樹,本間尚文,青木孝文,樋口龍雄, "計算機代数に 基づく算術演算回路の表現と検証," DAシンポジウム2007 論文集, pp. 61--66, August 2007.

  • A. Tumewu, A. Miyamoto, N. Homma, T. Aoki and A. Satoh, "Power analysis against RSA software implementation on a 32-bit microprocessor," 平成19年度 電気関係学会東北支部連合大会, No. 1A17, p. 17, August 2007.

  • 菅原健,本間尚文,青木孝文,佐藤証, "サイドチャネル攻撃標準評価FPGAボードを用いた暗号ハードウェアに対する電力解析実験," マルチメディア,分散,強調とモバイル (DICOMO2007) シンポジウム, pp. 1415--1420, July 2007.

  • 宮本篤志,本間尚文,青木孝文,佐藤証, "特定入力パターンを用いたRSA暗号ハードウェアの単純電力解析," マルチメディア、分散、協調とモバイル (DICOMO2007) シンポジウム, pp. 1409--1414, July 2007.

  • 長嶋聖,本間尚文,菅原健,青木孝文,佐藤証, "波形フィルタリングによる暗号モジュールへの高精度電力解析," マルチメディア,分散,強調とモバイル (DICOMO2007) シンポジウム, pp. 1403--1408, July 2007.

  • 渡邉裕樹,本間尚文,青木孝文,樋口龍雄, "並列プレフィックス加算器を用いた算術演算モジュールの自動生成," 信学技報, Vol. 107, No. 101, pp. 49--54, June 2007.

  • 出川勝彦,本間尚文,青木 孝文,樋口龍雄, "Counter Tree Diagramによる多値算術演算回路の最適設計," 第20回 回路とシステム軽井沢ワークショップ, pp. 361--366, April 2007.

  • 菅原健, 本間尚文, 青木孝文, 佐藤証, "ISO標準ブロック暗号のASICハードウェア性能評価," 2007年情報通信基礎サブソサイエティ合同研究会, 信学技報, vol. 106, No. 597, ISEC2006-159, pp. 111-117, 群馬, March 2007.

  • 本間尚文,宮本篤志,青木孝文,佐藤証,"固定値入力を用いたRSA暗号ハードウェアに対するSPA,"  2007年暗号と情報セキュリティシンポジウム, Vol. 3E3-2, pp.1-6, January 2007.

  • 本間尚文,長嶋聖,今井裕一,青木孝文,佐藤証,"位相限定相関法を用いた高精度差分電力解析とそのノイズ耐性評価," 2007年暗号と情報セキュリティシンポジウム, Vol. 2E4-5, pp.1-6, January 2007.

  • 渡邉裕樹,本間尚文,青木孝文,樋口龍雄, "算術演算回路の形式的検証手法とその評価," デザインガイア2006 〜VLSI設計の新しい大地を考える研究会〜, Vol. 106, No. 387, pp. 17--22, November 2006.

  • 長嶋聖,本間尚文,今井裕一,青木孝文,佐藤証," 位相限定相関法に基づく高精度波形マッチング -- 暗号ハードウェアの動作解析への応用 --," 第21回信号処理シンポジウム, pp. B5-4,November 2006.

  • 宮本篤志,本間尚文,青木孝文,佐藤証," RSA暗号のFPGA実装に対するSPA耐性評価," コンピュータセキュリティシンポジウムCSS2006,pp. 263--268,October 2006.

  • 菅原健,本間尚文,青木孝文,佐藤証,"64ビットブロック暗号CAST-128の小型ASIC実装," コンピュータセキュリティシンポジウムCSS2006,pp. 257--262,October 2006.

  • 今井裕一,本間尚文,長嶋聖,青木孝文,佐藤証,"位相限定相関法による波形マッチングを用いた高精度差分電力解析法," コンピュータセキュリティシンポジウムCSS2006,pp. 61--66,October 2006.

  • 菅原健,本間尚文,青木孝文,佐藤証, "漏洩電磁波による共通鍵暗号処理ハードウェアの動作解析," 平成18年度電気関係学会東北支部連合大会, p. 210, August 2006.

  • 本間尚文,青木孝文,樋口龍雄, "Counter Tree Diagramに基づく2値・多値高速加算器の解析," 第29回 多値論理フォーラム, Vol. 29, No. 12, pp. 1--6, August 2006.

  • 渡邉裕樹,本間尚文,青木孝文,樋口龍雄, "算術アルゴリズムの形式的検証に関する一考察," 第29回 多値論理フォーラム, Vol. 29, No. 11, pp. 1--6, August 2006.

  • 本間尚文,青木孝文,佐藤証, "暗号処理LSIの設計技術," IEEE EMC-S 仙台チャプタ・コロキウム,July 7, 2006. (招待講演)

  • 今井裕一,本間尚文,長嶋聖,青木孝文,佐藤証, “位相限定相関法に基づく高精度波形解析とそのサイドチャネル攻撃への応用,” 信学技報, IT2005-81, pp. 97--104, March 2006.

  • 宮本篤志,本間尚文,青木孝文,佐藤証, “積和演算器に基づくスケーラブル高基数モンゴメリ乗算器の設計と評価,” 2006年暗号と情報セキュリティシンポジウム, Vol. 2C4, No.1, pp.139--144, January 2006.

  • 宮本篤志, 渡邉裕樹, 本間尚文, 青木孝文, 樋口龍雄, “算術アルゴリズム記述言語ARITHに基づく冗長2進乗算器の形式的設計,” 平成17年度電気関係学会東北支部連合大会, p. 326, August 2005.

  • 渡邉裕樹, 本間尚文, 青木孝文, 樋口龍雄, “算術アルゴリズム記述言語ARITHに基づく算術演算回路の形式的設計,” 信学技報, CAS2005-21, pp. 37--42, June 2005.

  • 本間尚文, 青木孝文, 樋口龍雄, “冗長数系に基づく高速加算器の最適設計,” 信学技報, CAS2005-20, pp. 31--36, June 2005.

  • 石田 一哉, 本間 尚文, 青木 孝文, 樋口 龍雄, “算術アルゴリズム記述言語を用いた乗算器モジュールジェネレータの構築,” デザインガイア2004 〜VLSI設計の新しい大地を考える研究会〜, pp. 169--174, December 2004.

  • 若松泰平, 本間尚文, 崎山淳, 青木孝文, 樋口龍雄, “冗長加算器の最適設計に関する実験的検討,” 多値論理研究ノート/第27回多値論理フォーラム, pp. 14-1--14-8, September 2004.

  • 渡邉裕樹, 石田一哉, 本間尚文, 青木孝文, 樋口龍雄, “算術アルゴリズム記述言語ARITHに基づく並列乗算器の設計と評価,” 平成16年度電気関係学会東北支部連合大会, p. 261, August 2004.

  • 夏井雅典, 本間尚文, 青木孝文, 樋口龍雄, “進化的グラフ生成手法に基づくカレントミラー回路の合成,” 第17回 回路とシステム軽井沢ワークショップ講演論文集, pp. 415--420, April 2004.

  • 若松泰平, 本間尚文, 崎山淳, 青木孝文, 樋口龍雄,“Counter Tree Diagram に基づく冗長2進加算器の設計,” 2004年電子情報通信学会総合大会, A-3-10, p. 77 March 2004.

  • 崎山淳, 本間尚文, 若松泰平, 青木孝文, 樋口龍雄,“Counter Tree Diagramsによる冗長加算器の設計と評価,” 多値論理研究ノート第26巻, pp. 11-1--11-9, September 2003.

  • 夏井雅典, 本間尚文, 青木孝文, 樋口龍雄, “Evolutionary Graph Generation System and Its Application to Current Mirror Synthesis,” 平成15年度電気関係学会東北支部連合大会講演論文集, August 2003.

  • 高橋尚徳, 本間尚文, 青木孝文, 樋口龍雄,“VLSIデータパス自動生成システムの構築,” 平成15年度電気関係学会東北支部連合大会講演論文集, No. 1G13, p. 237, August 2003.

  • 石田一哉, 本間尚文, 青木孝文, 樋口龍雄,“算術アルゴリズム記述言語ARITHによるパイプライン乗算器の形式的検証,” 平成15年度電気関係学会東北支部連合大会講演論文集, No. 1F9, p. 194, August 2003.

  • 本間尚文,青木孝文, 樋口龍雄, “進化的グラフ生成システムとその定係数乗算器合成への応用,” 第15回 回路とシステム (軽井沢)ワークショップ 論文集, pp. 287--292, April 2002.

  • 本間尚文, 青木孝文, 樋口龍雄, “進化的グラフ生成システム EGG --VLSI演算回路合成への応用-- ,” 第199回計測自動制御学会東北支部研究集会, No. 199-10, pp. 1--10, December 2001.

  • 本間尚文, 陳定君, 青木孝文, 樋口龍雄, “Evolutionary graph generation and its application,” 第199回計測自動制御学会東北支部研究集会, No. 191-3, pp. 1--10, November 2000.

  • 本間尚文, 青木孝文, 樋口龍雄, “記号的機能検証に基づく進化的算術回路合成,” 平成11年度電気関係学会東北支部連合大会講演論文集, No.2F-5, p. 189, August 1999.

  • 本間尚文, 青木孝文, 樋口龍雄, “進化的グラフ生成手法に基づく算術演算回路設計,” 平成11年度SICE学術講演会講演論文集,” No. 204A-4, pp. 377--378, July 1999.

  • 本間尚文, 青木孝文, 樋口龍雄, “VLSI演算回路合成のためのグラフ表現の提案,” 平成10年度電気関係学会東北支部連合大会講演論文集, No. 1H1, p. 289, August 1998.

  • 本間尚文, 青木孝文, 樋口龍雄, “算術回路構造の進化的生成,” 電子情報通信学会技術研究報告, Vol. 98, No. 140, pp. 61--68, June 1998.

  • 本間尚文, 青木孝文, 樋口龍雄, “進化的グラフ生成システムに基づく算術アルゴリズム設計の提案,” 1998年電子情報通信学会総合大会講演論文集, No. A-3-15, p. 101, March 1998.