List of Papers

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1968

2008

Journal Papers

1. 近藤敏志, ハニア タイパルス, 遠間正真, 青木孝文,
   "インターネット共有画像を利用した事例ベース超解像画像処理,"
   映像情報メディア学会誌, Vol. 62, No. 11, pp. 1836--1839, November 2008.
   
   
2. H. Amirshahi, S. Kondo, K. Ito and T. Aoki,
   "An image completion algorithm using occlusion-free images from Internet photo sharing sites,"
   IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 10, pp. 2918--2927, October 2008.
   
   
3. 柴原琢磨，沼徳仁，長嶋聖，青木孝文，中島寛，小林孝次,
   "一次元位相限定相関法に基づくステレオ画像の高精度サブピクセル対応付け手法,"
   電子情報通信学会論文誌 D, Vol. J91-D, No. 9, pp. 2343--2356, September 2008.
   
   
4. A. Hayasaka, T. Shibahara, K. Ito, T. Aoki, H. Nakajima and K. Kobayashi,
   "A Passive 3D Face Recognition System and Its Performance Evaluation,"
   IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 8, pp. 1974--1981, August 2008.
   
   
5. 遠間正真, 近藤敏志, ハニアアミルシャヒ, 青木孝文,
   "画像共有サービスを利用した静止画符号化方式,"
   電子情報通信学会論文誌 D, Vol. J91-D, No. 8, pp. 1959--1962, August 2008.
   
   
6. 伊藤康一, 二階堂旭, 青木孝文, 小菅栄子, 川股亮太, 鹿島勇,
   "歯科X線写真のための位相限定相関法を用いた高精度位置合わせアルゴリズム,"
   電子情報通信学会論文誌 D, Vol. J91-D, No. 7, pp. 1788--1797, July 2008.
   
   
7. M. Hiratsuka, K. Ito, T. Aoki and T. Higuchi,
   "Shortest Path Search Using a Reaction-Diffusion Processor,"
   International Journal of Unconventional Computing, Vol. 4, No. 2, pp. 113--123, April 2008.
   
   
8. K. Ito, T. Aoki, H. Nakajima, K. Kobayashi and T. Higuchi,
   "A Palmprint Recognition Algorithm Using Phase-Only Correlation,"
   IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 4, pp. 1023--1030, April 2008.
   
   
9. T. Shibahara, T. Aoki, H. Nakajima and K. Kobayashi,
   "A High-Accuracy Stereo Correspondence Technique Using 1D Band-Limited Phase-Only Correlation,"
   IEICE Electronics Express, Vol. 5, No. 4, pp. 125--130, February 2008.
   
   
10. K. Ito, A. Nikaido, T. Aoki, E. Kosuge, R. Kawamata and I. Kashima,
    "A dental radiograph recognition system using phase-only correlation for human identification,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 1, pp. 298--305, January 2008.
    
    
11. N. Homma, S. Nagashima, T. Sugawara, T. Aoki, A. Satoh,
    "A high-resolution phase-based waveform matching and its application to side-channel attacks,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 1, pp. 193--202, January 2008.
    
    

    International Conference Proceedings

12. K. Miyazawa and T. Aoki,
    "A Robot-based 3D Body Scanning System Using Passive Stereo Vision,"
    Proceedings of the IEEE International Conference on Image Processing 2008, pp. 305--308, October 2008.
    
    
13. T. Sugawara, N. Homma, T. Aoki, and A. Satoh,
    "Compact ASIC Architectures for the 512-bit Hash Function Whirlpool,"
    9th Workshop on Information Security Applications (WISA2008), September 2008.
    
    
14. T. Takahashi, N. Numa, T. Aoki and S. Kondo,
    "A Geometric Correction Method for Projected Images Using SIFT Feature Points,"
    5th ACM/IEEE International Workshop on Projector-Camera Systems (PROCAMS2008), August 2008.
    
    
15. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Formal Verification of VLSI Circuits Using Groebner Bases,"
    Applications of Computer Algebra (ACA2008), July 2008.
    
    
16. Y. Watanabe, N. Homma, K. Degawa, T. Aoki and T. Higuchi,
    "High-level Design of Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language,"
    The 38th International Symposium on Multiple Valued Logic (ISMVL2008), pp. 112--117, May 2008.
    
    
17. A. Miyamoto, N. Homma, T. Aoki and A. Satoh,
    "Enhanced Power Analysis Attack Using Chosen Message against RSA Hardware Implementations,"
    2008 IEEE International Symposium on Circuits and Systems (ISCAS2008), pp. 3282--3285, May 2008.
    
    
18. T. Sugawara, N. Homma, T. Aoki, and A. Satoh,
    "High-performance ASIC Implementations of the 128-bit Block Cipher CLEFIA,"
    2008 IEEE International Symposium on Circuits and Systems (ISCAS2008), pp. 2925--2928, May 2008.
    
    
19. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Arithmetic Module Generator with Algorithm Optimization Capability,"
    2008 IEEE International Symposium on Circuits and Systems (ISCAS2008), pp. 1796--1799, May 2008.
    
    

    2007

    Journal Papers

20. N. Homma, K. Degawa, T. Aoki, T. Higuchi,
    "Design of multiple-valued arithmetic circuits using counter tree diagrams,"
    Journal of Multiple-Valued Logic and Soft Computing, Vol. 13, No. 4-6, pp. 487--502, November 2007.
    
    
21. 青木孝文, 伊藤康一, 本間尚文,
    "位相情報に基づく画像マッチング技術とその応用展開 ---3Dビジョンからバイオメトリクスまで---,"
    電子情報通信学会誌, Vol. 90, No. 8, pp. 680--685, August 2007.
    
    
22. 青木孝文, 伊藤康一, 柴原琢磨, 長嶋聖,
    "位相限定相関法に基づく高精度マシンビジョン ---ピクセル分解能の壁を越える画像センシング技術を目指して---,"
    IEICE Fundamentals Review, Vol. 1, No. 1, pp. 30--40, July 2007.
    
    
23. M. Natsui, Y. Tadokoro, N. Homma, T. Aoki and T. Higuchi,
    "Synthesis of current mirros based on evolutionary graph generation with transmigration capability,"
    IEICE Electronics Express, Vol. 4, No. 3, pp. 88--93, January 2007.
    
    

    International Conference Proceedings

24. E. Kosuge, R. Kawamata, I. Kashima, A. Nikaido, K. Ito and T. Aoki,
    "An automated dental radiograph identification system using phase-only correlation for mass disasters,"
    Radiological Society of North America (RSNA) 2007, pp. 974, November 2007.
    
    
25. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Formal representation and verification of arithmetic circuits using symbolic computer algebra,"
    The 14th Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 461--468, October 2007.
    
    
26. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Application of symbolic computer algebra to arithmetic circuit verification,"
    International Conference on Computer Design, pp. 25--32, October 2007.
    
    
27. A. Nikaido, K. Ito, T. Aoki, E. Kosuge, R. Kawamata,
    "A phase-based image registration algorithm for dental radiograph identification,"
    Proceedings of the IEEE International Conference on Image Processing 2007 (ICIP2007), No. WP-P1.10, pp. VI 229--232, September 2007.
    
    
28. T. Shibahara, T. Aoki, H. Nakajima, K. Kobayashi,
    "A sub-pixel stereo correspondence technique based on 1D phase-only correlation,"
    Proceedings of the IEEE International Conference on Image Processing 2007 (ICIP2007), pp. V 221--224, September 2007.
    
    
29. S. Nagashima, K. Ito, T. Aoki, H. Ishii and K. Kobayashi,
    "A high-accuracy rotation estimation algorithm based on 1D Phase-Only Correlation,"
    Proceedings of the International Conference on Image Analysis and Recognition (ICIAR 2007), pp. 210--221, August 2007.
    
    
30. S. Kondo, H. Amirshahi, T. Toma and T. Aoki,
    "Example-based super-resolution using Internet photo collection,"
    Proceedings SIGGRAPH 2007 poster program, August 2007.
    
    
31. T. Sugawara, N. Homma, T. Aoki and A. Satoh,
    "ASIC performance comparison for the ISO standard block ciphers,"
    The 2nd Joint Workshop on Information Security (JWIS2007), pp. 485--498, August 2007.
    
    
32. N. Homma, K. Degawa, T. Aoki and T. Higuchi,
    "Algorithm-level optimization of multiple-valued arithmetic circuits using counter tree diagrams,"
    Proceedings of the 37th IEEE International Symposium on Multiple-Valued Logic, No. 31, pp. 1--8, May 2007.
    
    
33. S. Nagashima, N. Homma, Y. Imai, T. Aoki and A. Satoh,
    "DPA Using Phase-Based Waveform Matching against Random-Delay Countermeasure,"
    Proceedings of 2007 International Symposium on Circuits and Systems (ISCAS2007), pp. 1807--1810, May 2007.
    
    
34. A. Miyamoto, N. Homma, T. Aoki and A. Satoh,
    "SPA Against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier,"
    Proceedings of 2007 International Symposium on Circuits and Systems (ISCAS2007), pp. 1847--1850, May 2007.
    
    
35. T. Sugawara, N. Homma, T. Aoki and A. Satoh,
    "A High-Performance ASIC Implementation of the 64-bit Block Cipher CAST-128,"
    Proceedings of 2007 International Symposium on Circuits and Systems (ISCAS2007), pp. 1859--1862, May 2007.
    
    

    2006

    Journal Papers

36. N. Homma, Y. Watanabe, T. Aoki, and T. Higuchi,
    "Formal Design of Arithmetic Circuits Based on Arithmetic Description Language,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No. 12, pp. 3500--3509, December 2006.
    
    
37. N. Homma, T. Aoki, and T. Higuchi,
    "Systematic interpretation of redundant arithmetic adders in binary and multiple-valued logic,"
    IEICE Transactions on Electronics, Vol. E89-C, No. 11, pp. 1645 --1654, November 2006.
    
    
38. T. Goto, K. Degawa, H. Inokawa, K. Furukawa, H. Nakashima, K. Sumitomo, T. Aoki and K. Torimitsu,
    "Molecular-Mediated Single-Electron Devices Operating at Room Temperature,"
    Japanese Journal of Applied Physics, Vol. 45, No. 5A, pp. 4285--4289, May 2006.
    
    
39. 小林孝次,青木孝文,
    "位相限定相関法を用いた虹彩認証装置,"
    画像ラボ, Vol. 17, No. 3, pp. 33--38, March 2006.
    
    
40. K. Ito, M. Hiratsuka, T. Aoki and T. Higuchi,
    "A Shortest Path Search Algorithm Using an Excitable Digital Reaction-Diffusion System,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Science, Vol. E89-A, No. 3, pp. 735--743, March 2006.
    
    
41. M. A. Muquit, T. Shibahara and T. Aoki,
    "A High-Accuracy Passive 3D Measurement System Using Phase-Based Image Matching"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Science, Vol. E89-A, No.3, pp. 686--697, March 2006.
    
    
42. 中島寛, 小林孝次, 森川誠, 勝亦敦, 伊藤康一, 青木孝文, 樋 口龍雄，
    "位相限定相関法に基づく指紋照合技術 - 般住宅向け指紋照合装 置のためのアルゴリズム設計と実現,"
    電気学会論文誌E（センサ．マイクロマシン準部門誌), Vol. 126, No. 2, pp. 38--46, February 2006.
    
    

    International Conference Proceedings

43. K. Ito, T. Aoki, H. Nakajima, K. Kobayashi and T. Higuchi,
    "A Phase-Based Palmprint Recognition Algorithm and Its Experimental Evaluation,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 215--218, December 2006.
    
    
44. K. Miyazawa, K. Ito, T. Aoki, K. Kobayashi and H. Nakajima,
    "An Implementation-Oriented Iris Recognition Algorithm Using Phase-Based Image Matching,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 231--234, December 2006.
    
    
45. A. Nikaido, K. Ito, T. Aoki, E. Kosuge and R. Kawamata,
    " A Dental Radiograph Registration Algorithm Using Phase-Based Image Matching for Human Identification,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 375--378, December 2006.
    
    
46. A. Hayasaka, T. Shibahara, K. Ito, T. Aoki, H. Nakajima and K. Kobayashi,
    "A 3D Face Recognition System Using Passive Stereo Vision and Its Performance Evaluation,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 379--382, December 2006.
    
    
47. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Formal Design of Decimal Arithmetic Circuits Using Arithmetic Communication Systems,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 419--422, December 2006.
    
    
48. S. Nagashima, T. Aoki, T. Higuchi and K. Kobayashi,
    "A Subpixel Image Matching Technique Using Phase-Only Correlation,"
    Proceedings of 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp. 701--704, December 2006.
    
    
49. N. Homma, S. Nagashima, Y. Imai, T. Aoki and A. Satoh,
    "High-resolution side-channel attack using phase-based waveform matching,"
    Cryptographic Hardware and Embedded Systems (CHES 2006), Lecture Notes in Computer Science 4249, pp. 187--200, October 2006.
    
    
50. K. Miyazawa, K. Ito, T. Aoki, K. Kobayashi and A. Katsumata,
    "An Iris Recognition System Using Phase-Based Image Matching,"
    Proceedings of the IEEE International Conference on Image Processing 2006, pp. 325--328, October 2006.
    
    
51. K. Ito, T. Aoki, H. Nakajima, K. Kobayashi, and T. Higuchi,
    "A Palmprint Recognition Algorithm Using Phase-Based Image Matching,"
    Proceedings of the IEEE International Conference on Image Processing 2006, pp. 2669--2672, October 2006.
    
    
52. N. Homma, T. Aoki and T. Higuchi,
    "Algorithm-Level Interpretation of Fast Adder Structures in Binary and Multiple-Valued Logic,"
    The 36th International Symposium on Multiple-Valued Logic, p. 2, May 2006.
    
    
53. K. Degawa, T. Aoki, T. Higuchi, H. Inokawa, K. Nishiguchi and Y. Takahashi,
    "A High-Density Ternary Content-Addressable Memory Using Single-Electron Transistors,"
    The 36th International Symposium on Multiple-Valued Logic, p. 19, May 2006.
    
    
54. Y. Watanabe, N. Homma, T. Aoki and T. Higuchi,
    "Arithmatic Module Generator Based on Arithmatic Description Language,"
    The 13th Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 153--160, April 2006.
    
    
55. K. Degawa, T. Aoki, T. Higuchi, H. Inokawa and Y. Takahashi,
    "A High-Density Content-Addressable Memory Using Single-Electron Transistors,"
    International Symposium on Bio- and Nano-Electronics in Sendai, pp. 129--130, March 2006.
    
    
56. K. Miyazawa, K. Ito, T. Aoki, K. Kobayashi and H. Nakajima,
    "A Phase-Based Iris Recognition Algorithm,"
    Lecture Notes in Computer Science (International Conference on Biometrics 2006), No. 3832, pp. 356--365, January 2006.
    
    
57. H. Nakajima, K. Kobayashi, M. Morikawa, A. Katsumata, K. Ito, T. Aoki and T. Higuchi,
    "Fast and Robust Fingerprint Identification Algorithm and Its Application to Residential Access Control Products,"
    Lecture Notes in Computer Science (International Conference on Biometrics 2006), No. 3832, pp. 326--333, January 2006.
    
    
58. K. Ito, A. Morita, T. Aoki, H. Nakajima, K. Kobayashi and T. Higuchi,
    "A Fingerprint Recognition Algorithm Combining Phased-Based Image Matching and Feature-Based Matching,"
    Lecture Notes in Computer Science (International Conference on Biometrics 2006), No. 3832, pp. 316--325, January 2006.
    
    

    2005

    Journal Papers

59. 青木孝文，
    "位相情報に基づく画像マッチングとその応用 - マシンビジョン からバイオメトリクス認証まで",
    月刊 自動認識，Vol. 18, No. 4, pp. 38--42,December 2005.
    
    
60. Y. Sasaki, K. Ito, T. Aoki and T. Higuchi,
    "A compact cluster computer with embedded CPUs and its application to rapid prototyping of fingerprint verification system,"
    IEICE Electronics Express, Vol. 2, No. 17, pp. 465--470, 2005.
    
    
61. K. Degawa, T. Aoki and T. Higuchi,
    "Prototype Fabrication of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic --- Device Scaling and Future Prospects ---,"
    Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, No. 5-6, pp. 545--565, 2005.
    
    
62. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
    "Design of Multiple-Valued Logic Circuits Using Graph-Based Evolutionary Synthesis,"
    Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, No. 5-6, pp. 519--544, 2005.
    
    
63. M. Kameyama, T. Hanyu and T. Aoki,
    "Multiple-Valued Logic as a New Computing Paradigm --- A Brief Survey of Higuchi's Research on Multiple-Valued Logic,"
    Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, No. 5-6, pp. 407--436, 2005.
    
    
64. H. Mochamad, H. C. Loy and T. Aoki,
    "Semi-Automatic Video Object Segmentation Using LVQ with Color and Spatial Features,"
    IEICE Transactions on Information and Systems, Vol. E88-D, No. 7, pp. 1553--1560, July 2005.
    
    

    International Conference Proceedings

65. K. Ito, M. Hiratsuka, T. Aoki and T. Higuchi,
    "Finding the Shortest Path by Using an Excitable Digital Reaction-Diffusion System,"
    Proceedings of 2005 International Symposium on Nonlinear Theory and its Applications, pp. 226--229, October 2005.
    
    
66. N. Uchida, T. Shibahara, T. Aoki, H. Nakajima and K. Kobayashi,
    "3D Face Recognition Using Passive Stereo Vision,"
    Proceedings of the 2005 IEEE International Conference on Image Processing, pp. II-950--II-953, September 2005.
    
    
67. K. Miyazawa, K. Ito, T. Aoki, K. Kobayashi and H. Nakajima,
    "An Efficient Iris Recognition Algorithm Using Phase-Based Image Matching,"
    Proceedings of the 2005 IEEE International Conference on Image Processing, pp. II-49--II-52, September 2005.
    
    
68. K. Ito, A. Morita, T. Aoki, T. Higuchi, H. Nakajima and K. Kobayashi,
    "A Fingerprint Recognition Algorithm Using Phase-Based Image Matching for Low-Quality Fingerprints,"
    Proceedings of the 2005 IEEE International Conference on Image Processing, pp. II-33--II-36, September 2005.
    
    
69. N. Homma, T. Aoki and T. Higuchi,
    "A Graph-Based Representation for Analyzing Fast Addition Algorithms,"
    Proceedings of the 7th International Symposium on Representations and Methodology of Future Computing Technologies, pp. 52--57, September 2005.
    
    
70. K. Degawa, T. Aoki, T. Higuchi, H. Inokawa and Y. Takahashi,
    "A Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors,"
    Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic, pp. 32--38, May 2005.
    
    

    2004

    Journal Papers

71. H. Inokawa, Y. Takahashi, K. Degawa, T. Aoki and T. Higuchi,
    "A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter,"
    IEICE Transactions on Electronics, Vol. E87-C, No. 11, pp. 1818--1826, November 2004.
    
    
72. K. Degawa, T. Aoki, T. Higuchi, H. Inokawa and Y. Takahashi,
    "A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic,"
    IEICE Transactions on Electronics, Vol. E87-C, No. 11, pp. 1827--1836, November 2004.
    
    
73. M. Hiratsuka, S. Ikeda, T. Aoki and T. Higuchi,
    "A Redox Microarray --- An Experimental Model for Molecular Computing Integrated Circuits ---,"
    IEICE Transactions on Electronics, Vol. E87-C, No. 11, pp. 1804--1808, November 2004.
    
    
74. K. Takita, M. A. Muquit, T. Aoki and T. Higuchi,
    "A Sub-Pixel Correspondence Search Technique for Computer Vision Applications,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 8, pp. 1913--1923, August 2004.
    
    
75. 本間尚文, 崎山淳, 若松泰平, 青木孝文, 樋口龍雄,
    "Counter Tree Diagramに基づく冗長加算器の系統的設計手法 --- 冗長2進加算器設計の例,"
    情報処理学会論文誌, Vol. 45, No. 5, pp. 1279--1288, May 2004.
    
    
76. K. Ito, H. Nakajima, K. Kobayashi, T. Aoki and T. Higuchi,
    "A Fingerprint Matching Algorithm Using Phase-Only Correlation,"
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 3, pp. 682--691, March 2004.
    
    
77. 平塚眞彦, 青木孝文, 樋口龍雄,
    "次世代分子コンピューティングを目指して,"
    ケミカルエンジニヤリング, Vol. 49, No. 1, pp. 30--34, January 2004.
    
    

    International Conference Proceedings

78. M. A. Muquit, T. Shibahara and T. Aoki,
    "High Accuracy 3D Measurement Using a Phase-Only Correlation Based Correspondence Search Technique,"
    Proceedings of the 7th International Conference on Computer and Information Technology, pp. 357--362, December 2004.
    
    
79. H. Mochamad, H. C. Loy, T. Aoki,
    "LVQ-Based Video Object Segmentation Through Combination of Spatial and Color Features,"
    Proceedings of the 2004 IEEE Region 10 Conference, pp. 211--214, November 2004.
    
    
80. N. Homma, K. Ishida, T. Aoki and T. Higuchi,
    "Arithmetic Description Language and Its Application to Parallel Multiplier Design,"
    Proceedings of the 12th Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 319--326, October 2004.
    
    
81. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
    "Topology-Oriented Design of Current Mirrors Using Evolutionary Graph Generation System,"
    Proceedings of the 12th Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 78--84, October 2004.
    
    
82. S. Sukaridhoto, Y. Sasaki, K. Ito and T. Aoki,
    "Development of a Compact Cluster with Embedded CPUs,"
    Proceedings of the Sixth Industrial Electronic Seminar 2004, pp. 340--343, October 2004.
    
    
83. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
    "Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation,"
    Proceedings of the Parallel Problem Solving from Nature - PPSN VIII, pp. 342--351, September 2004.
    
    
84. H. C. Loy, T. Aoki,
    "Robust Motion Estimation for Video Sequences Based on Phase-Only Correlation,"
    Proceedings of the 6th IASTED International Conference on Signal and Image Processing, pp. 441--446, August 2004.
    
    
85. M. Hiratsuka, S. Ikeda, T. Aoki and T. Higuchi,
    "Experimental observation of active wave propagation in a redox microarray,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 8D2L-6-1--8D2L-6-4, July 2004.
    
    
86. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation System with Transmigration Capability and Its Application to Current Mirror Circuit Synthesis,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 8A2L-3-1--8A2L-3-4, July 2004.
    
    
87. N. Roy, H. Mochamad and T. Aoki,
    "Parallel Implementation of LVQ-Based Video Object Tracking,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 7F3P-40-1--7F3P-40-4, July 2004.
    
    
88. M. A. Muquit, K. Takita and T. Aoki,
    "A Multi-Camera 3D Measurement System Using a Phase-Only Correlation Technique and Its Performance Evaluation,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 7F3P-39-1--7F3P-39-4, July 2004.
    
    
89. H. Mochamad, H. C. Loy and T. Aoki,
    "Integrating Spatial and Color Features for LVQ-Based Video Object Segmentation,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 7F3P-38-1--7F3P-38-4, July 2004.
    
    
90. K. Ito, T. Aoki, T. Higuchi,
    "Design of an Excitable Digital Reaction-Diffusion System for Shortest Path Search,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 7F3P-1-1--7F3P-1-4, July 2004.
    
    
91. K. Degawa, T. Kogure, T. Aoki and T. Higuchi,
    "Design and Evaluation of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic Circuits,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 7C1L-1-1--7C1L-1-4, July 2004.
    
    
92. N. Homma, T. Wakamatsu, J. Sakiyama, T. Aoki and T. Higuchi,
    "Counter Tree Diagrams for Redundant Adder Design,"
    Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 6C3L-2-1--6C3L-2-4, July 2004.
    
    
93. N. Homma, T. Aoki and T. Higuchi,
    "Multiplier Block Synthesis Using Evolutionary Graph Generation,"
    Proceedings of the 2004 NASA/DoD Conference on Evolvable Hardware, pp. 79--82, June 2004.
    
    
94. N. Homma, J. Sakiyama, T. Wakamatsu, T. Aoki and T. Higuchi,
    "A Systematic Approach for Analyzing Fast Addition Algorithms Using Counter Tree Diagrams,"
    Proceedings of the 2004 IEEE International Symposium on Circuits and Systems, pp. V-197--V-200, May 2004.
    
    
95. K. Ishida, N. Homma, T. Aoki and T. Higuchi,
    "Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH,"
    Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic, pp. 334--339, May 2004.
    
    
96. H. Inokawa, Y. Takahashi, K. Degawa, T. Aoki and T. Higuchi,
    "A Single-Electron-Transistor Logic Gate Family and Its Application --- Part II: Design and Simulation of a 7-3 Parallel Counter with Linear Summation and Multiple-Valued Latch Functions,"
    Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic, pp. 269--274, May 2004.
    
    
97. K. Degawa, T. Aoki, T. Higuchi, H. Inokawa and Y. Takahashi,
    "A Single-Electron-Transistor Logic Gate Family and Its Application --- Part I: Basic Components for Binary, Multiple-Valued and Mixed-Mode Logic,"
    Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic, pp. 262--268, May 2004.
    
    
98. N. Homma, M. Natsui, T. Aoki and T. Higuchi,
    "Graph-Based Approach for Synthesizing Arithmetic Circuits,"
    Proceedings of the 13th International Workshop on Post-Binary ULSI Systems, pp. 25--32, May 2004.
    
    

    2003

    Journal Papers

99. T. Aoki, N. Homma and T. Higuchi,
    "Evolutionary Synthesis of Arithmetic Circuit Structures,"
    Artificial Intelligence Review, Vol. 20, No. 3-4, pp. 199--232, December 2003.
    
    
100. J. Sakiyama, N. Homma, T. Aoki and T. Higuchi,
     "Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 12, pp. 3009--3019, December 2003.
     
     
101. K. Degawa, T. Aoki and T. Higuchi,
     "Design of a field-programmable digital filter chip using multiple-valued current-mode logic,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 8, pp. 2001--2010, August 2003.
     
     
102. K. Takita, T. Aoki, Y. Sasaki, T. Higuchi and K. Kobayashi,
     "High-accuracy subpixel image registration based on phase-only correlation,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 8, pp. 1925--1934, August 2003.
     
     
103. K. Ito, T. Aoki and T. Higuchi,
     "Fingerprint restoration using digital reaction-diffusion system and its evaluation,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 8, pp. 1916--1924, August 2003.
     
     
104. M. Hiratsuka, T. Aoki, H. Morimitsu and T. Higuchi,
     "Implementation of a redox microarray: an experimental model for future nanoscale biomolecular computing using integrated circuits,"
     IEE Proceedings -- Nanobiotechnology, Vol. 150, No. 1, pp. 9--14, June 2003.
     
     
105. J. Sakiyama, T. Aoki and T. Higuchi
     "Counter tree diagrams -- a unified representation of fast addition algorithms --,"
     Journal of Multiple-Valued Logic and Soft Computing, Vol. 9, No. 1, pp. 87--108, March 2003.
     
     

     International Conference Proceedings

106. N. Homma, M. Natsui, T. Aoki and T. Higuchi,
     "VLSI Circuit Design Using an Object-Oriented Framework of Evolutionary Graph Generation System,"
     Proceedings of 2003 Congress on Evolutionary Computation, pp. 115--122, December 2003.
     
     
107. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
     "Evolutionary Graph Generation System and Its Application to MOS Current Mirror Synthesis,"
     Proceedings of 2003 IEEE International Symposium on Intelligent Signal Processing and Communication Systems, pp. 747--752, December 2003.
     
     
108. K. Ito, T. Aoki and T. Higuchi,
     "Digital reaction-diffusion system and its application to bio-inspired texture image processing,"
     Proceedings of the 1st student-organizing international mini-conference on information electronics system, pp. 283--287, November 2003.
     
     
109. K. Takita, T. Aoki and T. Higuchi,
     "A sub-pixel image matching technique using phase-only correlation and its application,"
     Proceedings of the 1st student-organizing international mini-conference on information electronics system, pp. 278--282, November 2003.
     
     
110. N. Homma, T. Aoki, M. Motegi and T. Higuchi,
     "A framework of evolutionary graph generation system and its application to circuit synthesis,"
     Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, pp. V-201--V-204, May 2003.
     
     
111. K. Ito, T. Aoki and T. Higuchi,
     "Design of a digital reaction-diffusion system for restoring blurred fingerprint images,"
     Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, pp. IV-77--IV-80, May 2003.
     
     
112. K. Degawa, T. Aoki and T. Higuchi,
     "A field-programmable digital filter chip using multiple-valued current-mode logic,"
     Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic, pp. 213--220, May 2003.
     
     
113. J. Sakiyama, T. Aoki and T. Higuchi,
     "Counter tree diagrams for design and analysis of fast addition algorithms,"
     Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic, pp. 91-98, May 2003.
     
     

     2002

114. N. Homma, T. Aoki and T. Higuchi,
     "Evolutionary Synthesis of Circuit Structures,"
     2002 International Symposium on New Paradigm VLSI Computing, pp. 48--51, December, 2002
     
     
115. T. Aoki, K. Takita, T. Higuchi and K. Kobayashi,
     "Phase-Based Image Matching and Its Application to Intelligent Vision Systems,"
     2002 International Symposium on New Paradigm VLSI Computing, pp. 95--100, December, 2002
     
     
116. M. Hiratsuka, H. Morimitsu, T. Aoki and T. Higuchi,
     "Toward Molecular Computing Using Artificial Catalyst Devices,"
     2002 International Symposium on New Paradigm VLSI Computing, pp. 121--124, December, 2002
     
     
117. M. Hariadi, A. Harada, T. Aoki and T. Higuchi,
     "An LVQ-Based Human Motion Segmentation,"
     IEEE Asia PacificConference on Circuits and System 2002, Vol. II, pp. 171--176, December, 2002
     
     
118. M. Hariadi,A. Harada, T. Aoki and T. Higuchi,
     "Pixel-wise Human Motion Segmentation using Learning Vector Quantization,"
     IEEE Proceeding of 7th International Conference on Control, Automation, and Vision, pp. 1439--1444, December, 2002.
     
     
119. K. Takita, T. Aoki, Y. Sasaki, T. Higuchi and K. Kobayashi,
     "High-Accuracy Image Registration Based on Phase-Only Correlation and Its Experimental Evaluation,"
     IEEE 2002 International Symposium on Intelligent Signal Processing and Communication Systems, pp. 86--90, November 2002.
     
     
120. M. A. Muquit, K. Takita, T. Aoki and T. Higuchi,
     "High-Accuracy Passive 3D Mesurement Using Multi-Camera System Based on Phase-Only Correlation,"
     IEEE 2002 International Symposium on Intelligent Signal Processing and Communication Systems, pp. 91--95, November 2002.
     
     
121. K. Ito, T. Aoki and T. Higuchi,
     "Fingerprint Restoration Using Digital Reaction-Diffusion System,"
     IEEE 2002 International Symposium on Intelligent Signal Processing and Communication Systems, pp. 188--172, November 2002.
     
     
122. M. Motegi, N. Homma, T. Aoki, and T. Higuchi,
     "Evolutionary Graph Generation System and Its Application to Bit-Serial Arithmetic Circuit Synthesis,"
     Parallel Problem Solving from Nature - PPSN VII, pp. 831--840, September 2002.
     
     
123. M. Natsui, T. Aoki and T. Higuchi,
     "Parallel Evolutionary Graph Generation with Terminal-Color Constraint and Its Application to Current-Mode Logic Circuit Design,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E85-A, No. 9, pp. 2061--2071, September 2002.
     
     
124. M. Natsui, T. Aoki, and T. Higuchi,
     "Parallel Evolutionary Graph Generation on a PC Cluster and Its Application to Multiple-Valued Circuit Synthesis,"
     Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic, pp. 96--102, May 2002.
     
     
125. N. Homma, T. Aoki and T. Higuchi,
     "Graph-Based Individual Representation for Evolutionary Synthesis of Arithmetic Circuits,"
     Proceedings of the 2002 Congress on Evolutionary Computation, pp. 1492--1497, May 2002.
     
     
126. N. Homma, T. Aoki and T. Higuchi,
     "Evolutionary graph generation system with transmigration capability and its application to arithmetic circuit synthesis,"
     IEE Proceedings - Circuits, Devices and Systems, Vol. 149, No. 2, pp. 97--104, April 2002.
     
     
127. D. Chen, T. Aoki, N. Homma, T. Terasaki, and T. Higuchi,
     "Graph-Based Evolutionary Design of Arithmetic Circuits,"
     IEEE Transactions on Evolutionary Computation, Vol. 6, No. 1, pp. 86--100, February 2002.
     
     
128. D. Chen, T. Aoki, N. Homma, and T. Higuchi,
     "Parallel Evolutionary Design of Constant-Coefficient Multipliers,"
     IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E85-A, No. 2, pp. 508--512, February 2002.
     
     
129. M. Hiratsuka, T. Aoki, H. Morimitsu, and T. Higuchi,
     "Implementation of Reaction-Diffusion Cellular Automata,"
     IEEE Transactions on Circuits and Systems--I: Fundamental Theory and Applications, Vol. 49, No. 1, pp. 10--16, January 2002.
     
     

     2001

130. D. Chen, T. Aoki, N. Homma and T. Higuchi,
     "Pragmatic method for the design of fast constant-coefficient combinational multipliers,"
     IEE Proceedings -Computers and Digital Techniques-, Vol. 148, No. 6, pp. 196--206, November 2001.
     
     
131. T. Aoki, K. Nakazawa, and T. Higuchi,
     "Design of High-Radix VLSI Dividers without Quotient Selection Tables",
     IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 11, pp. 2623--2631, November 2001.
     
     
132. M. Natsui, T. Aoki, and T. Higuchi,
     "Evolutionary Graph Generation System with Terminal-Color Constraint -- An Application to Multiple-Valued Logic Circuit Synthesis -",
     IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 11, pp. 2808--2810, November 2001.
     
     
133. K. Ito, T. Aoki and T. Higuchi,
     "Digital Reaction-Diffusion System and Its Application,"
     2001 International Symposium on Nonlinear Theory and its Applications, Vol. 1, pp. 99--102, October-November 2001.
     
     
134. H. Morimitsu, M. Hiratsuka, T. Aoki and T. Higuchi,
     "Experimental Observation of Active Wave Propergation in Reaction-Diffusion Cellular Automata,"
     2001 International Symposium on Nonlinear Theory and its Applications, Vol. 2, pp. 517--520, October-November 2001.
     
     
135. J. Sakiyama, T. Aoki and T. Higuchi,
     "Counter Tree Diagrams for Fast Addition Algorithms",
     The Second Korea-Japan Joint Symposium on Multiple-Valued Logic, pp. 36--39, August 2001.
     
     
136. M. Sekine, T. Aoki and T. Higuchi,
     "Formal Definition of the Functional Verification Procedure for Arithmetic Description Language: ARITH",
     The Second Korea-Japan Joint Symposium on Multiple-Valued Logic, pp. 162--165, August 2001.
     
     
137. K. Ito, T. Aoki, and T. Higuchi,
     "Digital Reaction-Diffusion System -- A Foundation of Bio-Inspired Texture Image Processing --",
     IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 8, pp. 1909--1918, August 2001.
     
     
138. M. Natsui, T. Aoki and T. Higuchi,
     "Evolutionary graph generation with terminal-color constraint for heterogeneous circuit synthesis,"
     ELECTRONICS LETTERS, Vol. 37, No. 13, pp.808--810, June 2001.
     
     
139. 青木 孝文, 樋口 龍雄.
     "ディジタル信号処理とコンピューティング --- 第3回 ディジタルモルフォジェネシス --- 生物の形態形成モデルに基づく信号処理アルゴリズム,"
     Journal of Signal Processing, Vol. 5, No. 3, pp. 173--182, May 2001.
     
     
140. M. Natsui, T. Aoki and T. Higuchi,
     "Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation,"
     31st IEEE Int. Symp. on Multiple-Valued Logic, pp. 253--258, May 2001.
     
     
141. M. Hiratsuka, T. Aoki and T. Higuchi,
     "A Model of Reaction-Diffusion Cellular Automata for Massively Parallel Molecular Computing,"
     31st IEEE Int. Symp. on Multiple-Valued Logic, pp. 247--252, May 2001.
     
     
142. T. Terasaki, T. Aoki and T. Higuchi,
     "Evolutionary Synthesis of Bit-serial Arithmetic Circuits",
     情報処理学会論文誌, Vol. 42, No. 4, pp. 975--982, April 2001.
     
     
143. D. Chen, T. Aoki, N. Homma and T. Higuchi,
     "Evolutionary design for high-speed constant-coefficient multipliers",
     ELECTRONICS LETTERS, Vol. 37, No. 4, pp. 256--258, February 2001.
     
     
144. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Reaction-diffusion cellular automaton using integrated microelectrodes",
     ELECTRONICS LETTERS, Vol. 37, No. 2, pp. 87--89, January 2001.
     
     

     2000

145. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Implementation of a 1-D reaction-diffusion cellular automaton,"
     Abstract of the Int. conference on DYNAMICAL ASPECTS OF COMPLEX SYSTEMS: FROM CELLS TO BRAIN, p. 24, November 2000.
     
     
146. T. Terasaki, T. Aoki and T. Higuchi,
     "Evolutionary Synthesis of Sequential Arithmetic Circuits,"
     2000 Int. Symp. on Intelligent Signal Processing and Communication Systems Proceedings, Vol. II, pp. 1067--1072, November 2000.
     
     
147. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Active Wave Propagation in a Reaction-Diffusion Cellular Automaton Using a Microelectrode Array,"
     Proceedings of the 2000 Int. Symp. on Nonlinear Theory and its Applications, Vol. 1, pp. 319--322, September 2000.
     
     
148. N. Homma, T. Aoki, and T. Higuchi,
     "Evolutionary Synthesis of Fast Constant-Coefficient Multipliers",
     IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E83-A, No. 9, pp. 1767--1777, September 2000.
     
     
149. T. Aoki, I. Kitaori, and T. Higuchi,
     "Radix-2-4-8 CORDIC for Fast Vector Rotation",
     IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E83-A, No. 6, pp. 1106--1114, June 2000.
     
     
150. T. Aoki and T. Higuchi,
     "Beyond-Binary Arithmetic -- Algorithms and Implementations --,"
     Extended Abstracts of The 9th International Workshop on Post-Binary Ultra-Large-Scale Integration Systems, pp. 7--10, May 2000.
     
     
151. Y. Yuminaka, O. Katho, Y. Sasaki, T. Aoki and T. Higuchi,
     "An Efficient Data Transmission Technique for VLSI Systems Based on Multiple-Valued Code-Division Multiple Access,"
     Proceedings THE 30TH IEEE Int. Symp. on Multiple-Valued Logic, pp. 430--437, May 2000.
     
     
152. T. Aoki, K. Nakazawa and T. Higuchi,
     "High-Radix Parallel VLSI Dividers without Using Quotient Digit Selection Tables,"
     Proceedings THE 30TH IEEE Int. Symp. on Multiple-Valued Logic, pp. 345--352, May 2000.
     
     
153. N. Homma, T. Aoki and T. Higuchi
     "Evolutionary graph generation system with symbolic verification for arithmetic circuit design",
     ELECTRONICS LETTERS, Vol. 36, No. 11, pp. 937--939, May 2000.
     
     
154. T. Aoki and T. Higuchi,
     "Beyond-Binary Arithmetic: Algorithms and VLSI Implementations",
     Interdisciplinary Information Sciences, Vol. 6, No. 1, pp. 75--98, March 2000.
     
     

     1999

155. N. Homma, T. Aoki and T. Higuchi,
     "Evolutionary Generation of Constant-Coefficient Multipliers,"
     IEEE Int. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 481-484, Phuket, 1999.
     
     
156. W. Fujita, T. Aoki and T. Higuchi,
     "A Digital Reaction-Diffusion System for Texture Image Processing,"
     IEEE Int. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp.113-116, Phuket, 1999.
     
     
157. N. Homma, T. Aoki and T. Higuchi,
     "A New Evolutionary Approach for Synthesizing Circuit Structures,"
     Int. Symp. on Nonlinear Theory and Its Applications (NOLTA), 1, pp. 239-242, Hawaii, 1999.
     
     
158. T. Aoki, Y. Sawada and T. Higuchi,
     "Signed-Weight Arithmetic and Its Application to a Field-Programmable Digital Filter Architecture,"
     IEICE Trans. on Electronics., E52-C, 9, pp. 1687-1698, 1999.
     
     
159. Y. Yuminaka, K. Itoh, Y. Sasaki, T. Aoki and T. Higuchi,
     "A Code-Division Multiplexing Technique for Efficient Data Transmission in VLSI Systems,"
     IEICE Trans. on Electronics., E52-C, 9, pp. 1669-1677, 1999.
     
     
160. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Pattern Formation in Reaction-Diffusion Enzyme Transistor Circuits,"
     IEICE Trans. on Fundamentals, E82-A, 9, pp. 1809-1817, 1999.
     
     
161. I. Kitaori, T. Aoki and T. Higuchi,
     "Radix-2-4-8 CORDIC for Fast Sine and Cosine Computation,"
     IEICE Trans. on Fundamentals, E82-A, 9, pp. 1809-1817, 1999.
     
     
162. C. H. Lee, M. Kawamata and T. Higuchi,
     "Roundoff Error Analysis in the Decoding of Fractal Image Coding Using a Simplified State-Space Model,"
     IEICE Trans. on Fundamentals, E82-A, 6, pp. 872-878, 1999.
     
     
163. T. Aoki, N. Homma and T. Higuchi,
     "Evolutionary Design of Arithmetic Circuits,"
     IEICE Trans. on Fundamentals, E82-A, 5, pp. 798-806, 1999.
     
     
164. T. Aoki, K. Hoshi and T. Higuchi,
     "Redundant Complex Arithmetic and Its Application to Complex Multiplier Design,"
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 200-207, Freiburg, 1999.
     
     
165. N. Homma, T. Aoki and T. Higuchi,
     "Evolutionary Graph Generation System for Arithmetic Circuit Design,"
     Inter National Symposium on Future of Intellectual Integrated Electronics, pp. 355--364, March 1999.
     
     
166. T. Aoki and T. Higuchi,
     "Beyond-Binary Arithmetic Algorithms,"
     Inter National Symposium on Future of Intellectual Integrated Electronics, pp. 333--353, March 1999.
     
     
167. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Enzyme transistor circuits for reaction-diffusion computing,"
     IEEE Transactions on Circuits and Systems - I, Vol. 46, No. 2, pp. 294--303, February 1999.
     
     
     

     1998

168. 青木孝文, 中西崇, 樋口龍雄.
     "擬似ランダム系列に基づく集合論理アーキテクチャ."
     電子情報通信学会論文誌, Vol. J81-D-I, No. 11, pp. 1163--1170, 1998.
     
     
     
169. Yasushi Yuminaka, Takafumi Aoki, and Tatsuo Higuchi,
     "Frequency-mode set-valued logic for wave-parallel computing - design and experimental realization-,"
     Multiple-Valued Logic, Vol. 3, No. 4, pp. 301--332, 1998.
     
     
     
170. Takafumi Aoki, Naofumi Homma, and Tatsuo Higuchi,
     "Design of arithmetic circuits based on evolutionary graph generation,"
     Proc. of the Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI '98), 1998.
     
     
     
171. M. Hiratsuka, T. Aoki and T. Higuchi,
     "Pattern formation in enzyme transistor circuits with diffusive coupling,"
     Proceedings of 1998 International Symposium on Nonlinear Theory and its Applications, Vol. 1, pp. 351--354, September 1998.
     
     
     
172. T. Aoki, M. Hiratsuka and T. Higuchi,
     "Enzyme transistor circuits,"
     IEE Proceedings - Circuits, Devices and Systems, Vol. 145, No. 4, pp. 264--270, August 1998.
     
     
     
173. T. Aoki, M. Hiratsuka and T. Higuchi.
     "A model for biomolecular computing,"
     1998 International Workshop on Advanced LSIs,pp. 39--44, July 1998.
     （招待論文）
     
     
174. Yasushi Yuminaka, Yoshisato Sasaki, Takafumi Aoki and Tatsuo Higuchi.
     "Wave-Parallel Computing Systems using Multiple-Valued Pseudo-Orthogonal Sequences,"
     Proceedings of the 28th International Symposium on Multiple-Valued Logic, pp. 148--153, May 1998.
     
     
175. Takafumi Aoki and Tatsuo Higuchi.
     "Set-Valued Logic Circuits for Next Generation VLSI Architectures,"
     Proceedings of the 28th International Symposium on Multiple-Valued Logic, pp. 140--147, May 1998.
     
     
176. Y. H. Lee, M. Kawamata and T. Higuchi.
     "GA-Based Design of Multiplierless 2-D State-Space Digital Filters with Low Roundoff Noise,"
     IEEE Proc.-Circuits Devices Syst.,Vol.145, No.2.pp. 118--124, April 1998.
     
     
     
177. 青木孝文, 野木 均, 樋口龍雄.
     "高基数CORDICアルゴリズム,"
     電子情報通信学会論文誌 D-I, Vol. J81-D-I, No. 4, pp. 359--367, April 1998.
     
     
178. Yasushi Yuminaka, Yoshisato Sasaki, Takafumi Aoki and Tatsuo Higuchi.
     "Design of neural networks based on wave-parallel computing technique,"
     Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, Vol. 15, No. 3, pp. 315--327, March 1998.
     
     
179. X. Yang Masayuki Kawamata, and Tatsuo HIguchi.
     "A perfect-reconstruction encryption scheme by using periodically time-varying digital filters."
     IEICE Trans. on Fundamentals, Vol. E81-A, No. 1, pp. 192--196, 1998.
     
     
180. Choong-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Analysis of scaling-factor-quantization error in fractal image coding."
     IEICE Trans. on Fundamentals, Vol. E80-A, No. 12, pp. 2572--2580, 1997.
     
     

     1997

181. Tatsuo Higuchi and Takafumi Aoki.
     "Multiplex computing system based on set-valued logic,"
     Computers & Electrical Engineering, Vol. 23, No. 6, pp. 381--392, November 1997.
     
     
182. Toshimizu Abiko, Masayuki Kawamata, and Tatsuo Higuchi.
     "An efficient algorithm for solving inverse problem of fractal images using the complex moment method."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, pp. S12.4.1--12.4.6, 1997.
     
     
183. Takafumi Aoki, Hitoshi Nogi, and Tatsuo Higuchi.
     "High-radix cordic algotrithm for vlsi signal processing."
     IEEE Workshop on Signal Processing Systems,SiPS97 Design and Implementation, pp. 183--192, 1997.
     
     
184. 青木孝文, 天田博章, 樋口龍雄.
     "冗長複素数系に基づく実数／複素数再構成型算術演算回路 の構成."
     電子情報通信学会論文誌, Vol. J80-D-I, No. 8, pp. 674--682, 1997.
     
     
185. Takafumi Aoki, Shinichi Shionoya, and Tatsuo Higuchi.
     "Design and analysis of multiwave interconnection network for mcm-based parallel processing."
     IEICE Trans. on Electronics, Vol. E80-C, No. 7, pp. 935--940, 1997.
     
     
186. Takafumi Aoki, Hiroaki Amada, and Tatsuo Higuchi.
     "Real/complex reconfigurable arithmetic using redundant complex number systems."
     IEEE Symp. on Computer Arithmetic, pp. 200--207, 1997.
     
     
187. Kouji Kobayashi, Michitaka Kameyama, and Tatsuo Higuchi.
     "Communication network protocol for real-time distributed control and its LSI implementation."
     IEEE Trans. on Industrial Electronics, Vol. 44, No. 3, pp. 418--426, 1997.
     
     
188. Choong Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "State-space approach to roundoff error analysis of fractal image coding."
     IEEE Int. Symp. on Circuits and Systems, pp. 1341--1344, 1997.
     
     
189. Masahiko Hiratsuka, Takafumi Aoki, and Tatsuo Higuchi.
     "Enzyme transistor circuits for biomolecular computing."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 47--52, 1997.
     
     
190. Yasushi Yuminaka, Y. Sasaki, Takafumi Aoki, and Tatsuo Higuchi.
     "Wave-parallel neural networks using orthogonal sequences."
     IEE Electronics Letters, Vol. 33, No. 8, pp. 690--691, 1997.
     
     
191. Choong Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "State-space approach to roundoff error analysis of fractal image coding."
     IEICE Trans. on Fundamentals, Vol. E80-A, No. 1, pp. 159--165, 1997.
     
     

     1996

192. Hidekuni Moriya, Masayuki Kawamata, and Tatsuo Higuchi.
     "GA-based design of finite wordlength digital filters for simultaneous specifications in the frequency and spatial domain."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, Vol. 1, pp. 89--93, 1996.
     
     
193. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Balanced realizations and model reduction of periodically time-varying state-space digital filter."
     IEE Proc. -Vis, Image Signal Processing, Vol. 143, No. 6, pp. --, 1996.
     
     
194. Choong Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Roundoff error analysis of fractal coding schemes for grey-scale images."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication System, Vol. 3, pp. 1380--1385, 1996.
     
     
195. Young Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "GA-based design of multiplierless 2-D digital filters with very low roundoff noise."
     IEEE Asia-Pacific Conf. on Ciecuits and Systems, pp. 223--226, 1996.
     
     
196. Qiangfu Zhao and Tatsuo Higuchi.
     "Efficient learning of NN-MLP based on individual evolutionary algorithm."
     Neurocomputing, Vol. 13, pp. 201--215, 1996.
     
     
197. Takafumi Aoki, Hiroshi Tokoyo, and Tatsuo Higuchi.
     "High-radix parallel dividers for VLSI signal processing."
     Proc. of IEEE Workshop on VLSI Signal Processing, pp. 83--92, October 1996.
     
     
198. 青木孝文, 桜井賢, 樋口龍雄.
     "光ウェーブキャスティングに基づく並列コンピューティングアーキテクチャ."
     電子情報通信学会, Vol. J79-D-I, No. 7, pp. 437--445, July 1996.
     
     
199. 青木孝文, 常世大史, 樋口龍雄.
     "商選択テーブルを用いない高基数除算器の構成."
     電子情報通信学会, Vol. J79-D-I, No. 7, pp. 416--424, July 1996.
     
     
200. Takafumi Aoki and Tatsuo Higuchi.
     "Redundant complex arithmetic."
     Proc. of the 1996 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 1230--1233, July 1996.
     
     
201. Tatsuo Higuchi and Takafumi Aoki.
     "A multiplex computing paradigm."
     Methodologies for the Conception, Design, and Application of Intelligent Systems, pp. 95--100, July 1996.
     
     
202. Qiangfu Zhao and Tatsuo Higuchi.
     "Evolutionary learning of nearest-neighbor MLP."
     IEEE Trans. on Neural Networks, Vol. 7, No. 3, pp. 762--767, May 1996.
     
     
203. 青木孝文, 平塚眞彦, 樋口龍雄.
     "酵素トランジスタ回路の解析と設計."
     電子情報通信学会, Vol. J-79A, No. 5, pp. 1073--1081, May 1996.
     
     
204. Yasushi Yuminaka, Yoshisato Sasaki, Takafumi Aoki, and Tatsuo Higuchi.
     "Wave-parallel computing technique for neural networks based on amplitude-modulated waves."
     Proc. of the 26th International Symposium on Multiple-Valued Logic, pp. 210--215, May 1996.
     
     
205. Masahide Abe, Masayuki Kawamata, and Tatsuo Higuchi.
     "Convergence behavior of evolutional digital filters on a multiple-peak surface."
     Proc. of IEEE International Symposium on Circuits and Systems, Vol. 2, pp. 185--188, May 1996.
     
     
206. Young-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "GA-based design of multiplierless 2-D state-space digital filters with very small roundoff noise."
     Proc. of IEEE International Conference on Acoustics, Speech and Signal Processing, pp. 1283--1286, May 1996.
     
     
207. Qiangfu Zhao and Tatsuo Higuchi.
     "Minimization of nearest neighbor classifires based on individual evolutional algorithm."
     Pattern Recognition Letters, No. 17, pp. 125--131, April 1996.
     
     
208. Young-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of multiplierless 2-D state-space digital filters over a power-of-two coefficient space."
     IEICE Trans. Fundamentals, Vol. E79-A, No. 3, pp. 374--377, March 1996.
     
     
209. Masahide Abe, Masayuki Kawamata, and Tatsuo Higuchi.
     "Evolutionary digital filtering based on the cloning and mating reproduction."
     IEICE Trans. Fundamentals, Vol. E79-A, No. 3, pp. 370--373, March 1996.
     
     
210. Takahiro Hanyu, Shigeki Abe, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of a rule-based highly-safe intelligent vehicle using a content-addressable memory."
     計測自動制御学会論文集, Vol. 32, No. 1, pp. 114--121, January 1996.
     
     

     1995

211. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Approximations of IIR periodically time-varying digital filters."
     IEE Proc. -Circuits Devices Syst., Vol. 142, No. 6, pp. 387--393, December 1995.
     
     
212. Young-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of 2-D state-space digital filters over a power-of-two coefficient space using a genetic algorithm."
     International Symposium on Communications, pp. 837--843, December 1995.
     
     
213. Masahiko Hiratsuka, Takafumi Aoki, and Tatsuo Higuchi.
     "A model of enzyme transistors."
     The 5TH International Symposium on Bioelectronic and Molecular Electronic Devices and The 6TH International Conference on Molecular Electronics and Biocomputing, pp. 79--80, November 1995.
     
     
214. Young-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of 2-D state-space digital filters with power-of-two coefficients based on a genetic algorithm."
     International Conference on Image Processing, pp. 133--136, October 1995.
     
     
215. Takafumi Aoki, Yuji Ohi, and Tatsuo Higuchi.
     "Redundant complex number arithmetic for high-speed signal processing."
     VLSI Signal Processing, pp. 523--532, October 1995.
     
     
216. Shinichi Shionoya, Takafumi Aoki, and Tatsuo Higuchi.
     "Multiwave interconnection networks for MCM-based parallel processing."
     EURO-PAR '95 Parallel Processing, pp. 593--607, August 1995.
     
     
217. 川又政征, 佐々木伸治, 樋口龍雄.
     "２の補数加算器を有する散逸的な２次直接型iiディジタルフィルタで発生するカオス的発振."
     電子情報通信学会論文誌, Vol. J78-A, No. 7, pp. 769--777, July 1995.
     
     
218. Young-Ho Lee, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of 2-D state-space digital filters using a genetic algorithm over a discrete powers-of two coefficient space."
     Joint Technical Conference on Circuits/System Computers and Communications, pp. 45--48, July 1995.
     
     
219. Q. F. Zhao and Tatsuo Higuchi.
     "On-line minimization of nearest neighbor based MLP."
     Proc. world Congress on Neural Networks, July 1995.
     
     
220. Takahiro Hanyu, Satoshi Aragaki, and Tatsuo Higuchi.
     "Functionally seperated, multiple-valued content-addressable memory and its applications."
     IEE Proc. Circuits Devices Systems, Vol. 142, No. 3, June 1995.
     
     
221. 阿部茂樹, 亀山充隆, 樋口龍雄.
     "広範囲なフォールトに対する高安全性を指向したリアルワールドコンピューティング用知的フォールトトレラントシス テムの構成."
     計測自動制御学会論文集, Vol. 31, No. 6, pp. 789--796, June 1995.
     
     
222. Masayuki Kawamata, Eiichiro Kawakami, and Tatsuo Higuchi.
     "Separable-denominator two-dimensional adaptive filters with application to noise reduction in images."
     Applied Mathematics and Computation, No. 69, pp. 111--122, June 1995.
     
     
223. Q. F. Zhao and Tatsuo Higuchi.
     "Individual evolutionary algorithm and its application to learning of nearest neighbor based MLP."
     Proc. International Workshop on Artificial Neural Networks, pp. 396--403, June 1995.
     
     
224. Yuji Ohi, Takafumi Aoki, and Tatsuo Higuchi.
     "Redundant complex number systems."
     Proc. 25th International Symposium on Multiple-Valued Logic, pp. 14--19, May 1995.
     
     
225. Satoshi Sakurai, Takafumi Aoki, and Tatsuo Higuchi.
     "Wire-free computing circuits using optical wave-casting."
     Proc. 25th International Symposium on Multiple-Valued Logic, pp. 8--13, May 1995.
     
     
226. Q. F. Zhao and Tatsuo Higuchi.
     "An evolutionary algorithm for solving multi-individual-multi-task problems."
     Proc. International Workshop on Biologically Inspired Evolutionary Systems, pp. 61--68, May 1995.
     
     
227. 川又政征, 長久真樹, 樋口龍雄.
     "多重解像度木探索による反復変換理論符号化の高速符号化 アルゴリズム."
     電子情報通信学会論文誌, Vol. J78-A, No. 2, pp. 253--260, February 1995.
     
     
228. 川又政征, 今窪純, 樋口龍雄.
     "遺伝的アルゴリズムに基づく分母分離形２次元ディジタルフィルタの最適設計法."
     電子情報通信学会論文誌, Vol. J78-A, No. 2, pp. 132--140, February 1995.
     
     

     1994

229. Takafumi Aoki and Tatsuo Higuchi.
     "Set-valued logic for multiplex computing:toward new-device-based superchips."
     Interdisciplinary Information Sciences, Vol. 1, pp. 1--18, November 1994.
     
     
230. Masayuki Kawamata, Jun Imakubo, and Tatsuo Higuchi.
     "Optimal design method of 2-D IIR digital filters based on a simple genetic algorithm."
     Proc. IEEE Int. Conf. on Image Processing, pp. 780--784, November 1994.
     
     
231. Masayuki Kawamata, Masaki Nagahisa, and Tatsuo Higuchi.
     "Multi-resolution tree search for iterated transformation theory-based coding."
     Proc. IEEE Int. Conf. on Image Processing, pp. 137--141, November 1994.
     
     
232. Takahiro Hanyu, Shigeki Abe, Michitaka Kameyama, and Tatsuo Higuchi.
     "Rule-based highly-safe intelligent vehicle using a new content-addressable memory."
     IEEE Intelligent Vehicle Symposium, pp. 467--472, October 1994.
     
     
233. Masayuki Kawamata, Jun Imakubo, and Tatsuo Higuchi.
     "Optimal design of multi-dimensional recursive digital filters using a simple genetic algorithm."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, pp. 301--306, October 1994.
     
     
234. Masayuki Kawamata, Masahide Abe, and Tatsuo Higuchi.
     "Evolutionary digital filter --adaptive digital filters based on evolutionary strategies of organisms--."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, pp. 263--268, October 1994.
     
     
235. Masayuki Kawamata, Tomotaka Yoshie, and Tatsuo Higuchi.
     "Realization of two-dimensional recursive and non-recursive adaptive filters using parallel separable structures."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, pp. 257--262, October 1994.
     
     
236. Masayuki Kawamata, Masaki Nagahisa, and Tatsuo Higuchi.
     "A fast coding algorithm for iterated transformation theory-based coding by multi-resolution tree search."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication System, pp. 109--114, October 1994.
     
     
237. Q. F. Zhao and Tatsuo Higuchi.
     "Supervised organization of nearest neighbor MLP."
     Proc. Int. Conf. on Neural Information Processing, pp. 1398--1403, October 1994.
     
     
238. Q. F. Zhao and Tatsuo Higuchi.
     "CLC-MLP is a general-purpose feature extractor."
     Int. Conf. on Neural Information Processing, pp. 406--411, October 1994.
     
     
239. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Coefficient sensitivity analysis of periodically time-varying state-space digital filters."
     IEEE Trans. on Circuits and Systems, Vol. 41, No. 8, pp. 526--536, August 1994.
     
     
240. Q. F. Zhao and Tatsuo Higuchi.
     "Efficient learning of nearest neighbor multilayer perceptrons."
     Int. Conf. on Fuzzy Logic, pp. 77--78, August 1994.
     
     
241. Takahiro Hanyu, Maho Kuwahara, and Tatsuo Higuchi.
     "Low-power 8-valued cellular array VLSI for high-speed image processing."
     IEICE Trans. on Electronics, Vol. E77-C, No. 7, pp. 1042--1048, July 1994.
     
     
242. Takashi Takimoto, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of multiplex interconnection networks for massively parallel computing systems."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 231--238, May 1994.
     
     
243. Yukio Watanabe, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of multiwave computing circuits based on a model of integrated opto-electronic devices."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 215--222, May 1994.
     
     
244. Yasushi Yuminaka, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of wave-parallel computing circuits for densely connected architectures."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 207--214, May 1994.
     
     
245. Shigeki Abe, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of an intelligent fault-tolerant system for real-world applications."
     Jour. of Robotics and Mechatronics, Vol. 6, No. 2, pp. 150--154, April 1994.
     
     
246. Yoshichika Fujioka, Michitaka Kameyama, and Tatsuo Higuchi.
     "Coordinate transformation VLSI processor for redundant manipulator control."
     Jour. of Robotics and Mechatronics, Vol. 6, No. 2, pp. 124--130, April 1994.
     
     
247. 楊学東, 川又政征, 樋口龍雄.
     "周期的時変ディジタルフィルタによるTDM-FDM変 換器の実現."
     電子情報通信学会論文誌, Vol. J77-A, pp. 626--634, April 1994.
     
     
248. 岩田靖, 川又政征, 樋口龍雄.
     "分母分離形２次元状態空間ディジタルフィルタの低次元分解に基づくブロック並列処理ア−キテクチャ."
     電子情報通信学会論文誌, Vol. J77-A, pp. 635--643, April 1994.
     
     
249. Michitaka Kameyama and Tatsuo Higuchi.
     "Prospects of multiple-valued ULSI processors."
     Int. Conf. on Advanced Microelectronic Device and Processing, pp. 777--784, March 1994.
     
     
250. Takafumi Aoki, Yukio Watanabe, Tatsuo Higuchi, Shoji Kawahito, and Yoshiaki Tadokoro.
     "Multiwave computing circuits using integrated opto-electronic devices."
     IEEE Int. Solid-State Circuits Conf., Vol. 37, pp. 134--135, February 1994.
     
     
251. Shoji Kawahito, M. Ishida, T. Nakamura, Michitaka Kameyama, and Tatsuo Higuchi.
     "High-speed area-efficient multiplier design using multiple-valued current-mode circuits."
     IEEE Trans. Comput., Vol. 43, pp. 34--42, January 1994.
     
     

     1993

252. Takafumi Aoki, Shuichi Maeda, and Tatsuo Higuchi.
     "Design of optical circuits for multiplex computing based on set-valued logic."
     OSA (The Optical Society of America) Applied Optics, Vol. 32, No. 35, pp. 7170--7183, December 1993.
     
     
253. Kazutoshi Yasunaga, Masayuki Kawamata, and Tatsuo Higuchi.
     "Interframe predictive iterated transformation theory-based coding with conditional replenishment."
     International Symposium on Nonlinear Theory and Its Applications, Vol. 4, pp. 1359--1362, December 1993.
     
     
254. Shinji Sasaki, Masayuki Kawamata, and Tatsuo Higuchi.
     "Chaotic oscillations in second-order direct form II digital filters with a nonlinear adder."
     International Symposium on Nonlinear Theory and Its Applications, pp. 255--258, December 1993.
     
     
255. Takafumi Aoki and Tatsuo Higuchi.
     "Biocomputing system with no wiring."
     International Symposium on Nonlinear Theory and Its Applications, Vol. 1, pp. 211--216, December 1993.
     
     
256. Satoshi Aragaki, Takahiro Hanyu, and Tatsuo Higuchi.
     "A high-density multiple-valued content-addressable memory based on one transistor cell."
     IEICE Trans. Electron., Vol. E76-C, No. 11, November 1993.
     
     
257. Takahiro Hanyu, Maho Kuwahara, and Tatsuo Higuchi.
     "Design of a low-power multiple-valued cellular array using dynamic circuits and its application to image processing."
     Proc. Int. Work. on Intelligent Signal Processing and Communication Systems, pp. 309--314, October 1993.
     
     
258. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Coefficient sensitivity analysis of periodically time-varying state-space digital filters."
     Proc. Int. Work. on Intelligent Signal Processing and Communication Systems, pp. 144--149, October 1993.
     
     
259. Yasushi Yuminaka, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of wave-parallel computing architectures and its application to massively parallel image processing."
     IEICE Trans. Electronics, Vol. E76-C, No. 7, pp. 1133--1143, July 1993.
     
     
260. Masayuki Kawamata and Tatsuo Higuchi.
     "Research topics and results on digital signal processing."
     IEICE Trans. Fundamentals, Vol. E-76A, No. 7, pp. 1087--1096, July 1993.
     
     
261. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Synthesis of minimum roundoff noise realizations of periodically time-varying state-space digital filters."
     KITE Journal of Electronics Engineering, Vol. 4, No. 1A, July 1993.
     
     
262. Kazutoshi Yasunaga, Masayuki Kawamata, and Tatsuo Higuchi.
     "Highly parallel processing for iterated transformation theory-based coding on loosely coupled SIMD processors."
     Joint Technical Conference on Circuits/Systems, Computers and Communications, pp. 628--633, July 1993.
     
     
263. Eiichiro Kawakami, Masayuki Kawamata, and Tatsuo Higuchi.
     "Realization of separable-denominator 2D adaptive filters based on LMS algorithm."
     Proc. Joint Technical Conference on Circuits and Systems, Computers and Communications, pp. 36--41, July 1993.
     
     
264. Takafumi Aoki, Yasushi Yuminaka, and Tatsuo Higuchi.
     "Design of frequency-mode set-valued logic networks."
     IEE Proceedings-G, Vol. 140, No. 3, pp. 191--198, June 1993.
     
     
265. Takahiro Hanyu, S. Choi, Michitaka Kameyama, and Tatsuo Higuchi.
     "3-D object recognition system based on 2-D chain code matching."
     IEICE Trans. Fundamentals, Vol. E76-A, No. 6, pp. 917--923, June 1993.
     
     
266. B. Kim, Michitaka Kameyama, and Tatsuo Higuchi.
     "Unified scheduling of high performance parallel VLSI processors for robotics."
     IEICE Trans. Fundamentals, Vol. E76-A, No. 6, pp. 904--910, June 1993.
     
     
267. Yasushi Iwata, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of VLSI array processors for very high speed 2-D digital filtering of high definition images."
     Proc. of Image Processing: Theory and Applications, pp. 259--262, June 1993.
     
     
268. Shuichi Maeda, Takafumi Aoki, and Tatsuo Higuchi.
     "Optical multiplex computing based on set-valued logic and its application to parallel sorting networks."
     IEICE Trans. on Information and Systems, Vol. E76-D, No. 5, pp. 605--615, May 1993.
     
     
269. Saneaki Tamaki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Code assignment algorithm for highly parallel multiple-valued combinational circuits based on partition theory."
     IEICE Trans. on Information and Systems, Vol. E76-D, No. 5, pp. 548--554, May 1993.
     
     
270. Yasushi Yuminaka, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of set-valued logic networks for wave-parallel computing."
     Int. Symp. on Multiple-Valued Logic, pp. 277--282, May 1993.
     
     
271. Takafumi Aoki and Tatsuo Higuchi.
     "Impact of interconnection-free biomolecular computing."
     Int. Symp. on Multiple-Valued Logic, pp. 271--276, May 1993.
     
     
272. Satoshi Aragaki, Takahiro Hanyu, and Tatsuo Higuchi.
     "A multiple-valued content-addressable memory using logic-value conversion and threshold functions."
     Int. Symp. on Multiple-Valued Logic, pp. 170--175, May 1993.
     
     
273. Yasushi Iwata, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of fine grain VLSI array processors for real-time 2-D digital filtering."
     Proc. IEEE Int. Symp. on Circuits and Systems, pp. 1559--1562, May 1993.
     
     
274. Masayuki Kawamata, Eiichiro Kawakami, and Tatsuo Higuchi.
     "Realization of lattice-form separable-denominator 2D adaptive filters."
     Proc. IEEE Int. Symp. on Circuits and Systems, pp. 295--298, May 1993.
     
     
275. 川又政征, 楊学東, 樋口龍雄.
     "周期的時変状態空間ディジタルフィルタに関する基礎的考 察---統計的解析，スケ−リング，安定性---."
     電子情報通信学会論文誌, Vol. J76-A, No. 4, pp. 589--597, April 1993.
     
     
276. Takahiro Hanyu, Koichi Takeda, and Tatsuo Higuchi.
     "Rule-programmable multiple-valued matching VLSI processor for real-time rule-based systems."
     IEICE Trans. Electron., Vol. E76-C, No. 3, pp.472--479, March 1993.
     
     
277. Makoto Honda, Michitaka Kameyama, and Tatsuo Higuchi.
     "Multiple-valued VLSI image processor based on residue arithmetic and its evaluation."
     IEICE Trans. Electron., Vol. E76-C, No. 3, pp. 455--462, March 1993.
     
     
278. Takeshi Kasuga, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of robust-fault-tolerant multiple-valued arithmetic circuits and their evaluation."
     IEICE Trans. Electron., Vol. E76-C, No. 3, pp. 428--435, March 1993.
     
     
279. Takahiro Hanyu, Michitaka Kameyama, and Tatsuo Higuchi.
     "Prospects of multiple-valued VLSI processors."
     IEICE Trans. Electron., Vol. E76-C, No. 3, pp. 383--392, March 1993.
     
     
280. Masayuki Kawamata, Sho Murakoshi, and Tatsuo Higuchi.
     "Analysis of multidimensional linear periodically shift-variant digital filters and its application to secure communication of images."
     IEICE Trans. Fundamentals, Vol. E-76A, No. 3, pp. 326--336, March 1993.
     
     
281. 楊学東, 川又政征, 樋口龍雄.
     "周期的時変状態空間ディジタルフィルタにおける丸め誤差最小構造の合成."
     電子情報通信学会論文誌, Vol. J76-A, No. 3, pp. 331--338, March 1993.
     
     
282. 羽生貴弘, 樋口龍雄.
     "多進木網に基づく高速多値連想メモリ."
     電子情報通信学会論文誌, Vol. J76-D-I, No. 2, pp. 54--62, February 1993.
     
     
283. Takahiro Hanyu, Michitaka Kameyama, and Tatsuo Higuchi.
     "Beyond-binary circuits for signal processing."
     ISSCC Digest of Technical Papers, Vol. TA8.6, pp. 134--135, February 1993.
     
     
284. Shuichi Maeda, Takafumi Aoki, and Tatsuo Higuchi.
     "Toward multiwave opto-electronics for 3-D parallel computing."
     ISSCC Digest of Technical Papers, Vol. 36, pp. 132--133, February 1993.
     
     

     1992

285. Takeshi Kasuga, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of robust-fault-tolerant multiple-valued arithmetic circuits for highly safe digital system."
     IEEE Asia-Pacific Conf. on Circuits and Systems, pp. 59--63, dec 1992.
     
     
286. Takafumi Aoki and Tatsuo Higuchi.
     "A model of biodevice network for interconnection-free computing."
     Int. Symp. on Bioelectronic and Molecular Electron Dvices, pp. 9--10, December 1992.
     
     
287. Takafumi Aoki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Interconnection-free biomolecular computing."
     IEEE Computer, Vol. 25, No. 11, pp. 41--50, November 1992.
     
     
288. Yoshichika Fujioka, Michitaka Kameyama, and Tatsuo Higuchi.
     "240MOPS reconfigurable parallel VLSI processor for robot control."
     IEEE Int. Conf. on Industrial, Electronics, Control, Instrumentation and Automation, Vol. 3, No. 3, pp. 1385--1390, November 1992.
     
     
289. Takahiro Hanyu, Tomoya Kodama, and Tatsuo Higuchi.
     "200-vertex on-chip clique-finding VLSI processor for real-time 3-D object recognition."
     IEEE Int. Conf. on Industrial, Electronics, Control, Instrumentation and Automation, Vol. 3, pp. 1379--1384, November 1992.
     
     
290. 藤岡与周, 亀山充隆, 樋口龍雄.
     "冗長マニピュレ−タ制御用座標変換VLSIプロセッサ."
     電子情報通信学会論文誌D-I, Vol. J75-D-I, No. 10, pp. 909--916, October 1992.
     
     
291. Katsuhiko Shimabukuro, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of a multiple-valued VLSI processor for digital control."
     IEICE Trans. Information and Systems, Vol. E75-D, No. 5, September 1992.
     
     
292. Masayuki Kawamata, X. Yang, and Tatsuo Higuchi.
     "Fundamental study on periodically time-varying state-space digital filters -statistical analysis,scaling and stability-."
     IEEE International Conference on System Engineering, Vol. FAM-4.5, , September 1992.
     
     
293. B. Kim, Michitaka Kameyama, and Tatsuo Higuchi.
     "Unified scheduling of high performance parallel VLSI processors for robotics."
     Joint Technical Conf. on Circuits/Systems,Computers and Communications, Vol. E4, No. 5, pp. 776--781, July 1992.
     
     
294. X. Yang, Masayuki Kawamata, and Tatsuo Higuchi.
     "Synthesis of minimum average roundoff noise realizations of periodically time-varying state-space digital filters."
     JTCCSCC, Vol. E3, No. 5, pp. 745--750, July 1992.
     
     
295. S. Choi, Takahiro Hanyu, and Tatsuo Higuchi.
     "VLSI-oriented 3-D object recognition algorithm based on chain code matching."
     Joint Technical Conf. on Circuits/Systems,Computers and Communications, Vol. A2, No. 2, pp. 36--40, July 1992.
     
     
296. 青木孝文, 前田修一, 樋口龍雄.
     "波長多重光電子集積回路モデルに基づく集合論理回路網の構成."
     電子情報通信学会論文誌(D-I), Vol. J75-D-I, No. 7, pp. 419--430, July 1992.
     
     
297. Masayuki Kawamata, Takehiko Kagoshima, and Tatsuo Higuchi.
     "Design of three-dimensional digital filters for video signal processing via decomposition of magnitude specifications."
     IEICE Trans., Vol. E75-A, No. 7, pp. 821--829, July 1992.
     
     
298. Masayuki Kawamata, Yasushi Iwata, and Tatsuo Higuchi.
     "Design and evaluation of highly parallel VLSI processors for 2-D state-space digital filters using hierarchical behavioral description language and synthesizer."
     IEICE Trans. Fundamentals, Vol. E75-A, No. 7, pp. 837--845, July 1992.
     
     
299. Bumchul Kim, Michitaka Kameyama, and Tatsuo Higuchi.
     "Parallel VLSI processors for robotics using multiple bus interconnection networks."
     IEICE Trans. Fundamental, Vol. E75-A, No. 6, pp. 712--719, June 1992.
     
     
300. 川人祥二, 水野健太朗, 石田誠, 中村哲郎, 亀山充隆, 樋口龍雄.
     "冗長正ディジット数表現に基づく多値電流モード高速並列乗算器."
     電子情報通信学会論文誌, Vol. J75-D-I, No. 5, pp. 270--279, May 1992.
     
     
301. Saneaki Tamaki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Code assignment algorithm for highly parallel multiple-valued combinational circuits."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 382--388, May 1992.
     
     
302. Makoto Honda, Michitaka Kameyama, and Tatsuo Higuchi.
     "Residue arithmetic based multiple-valued VLSI image processor."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 330--336, May 1992.
     
     
303. Katsuhiko Shimabukuro, Michiataka Kameyama, and Tatsuo Higuchi.
     "Design of a multiple-valued VLSI processor for digital control."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 322--329, May 1992.
     
     
304. Shuichi Maeda, Takafumi Aoki, and Tatsuo Higuchi.
     "Set-valued logic networks based on optical wavelength multiplexing."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 282--290, May 1992.
     
     
305. Takahiro Hanyu, Kouichi Takeda, and Tatsuo Higuchi.
     "Design of a multiple-valued rule-programmable matching VLSI chip for real-time rule-based systems."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 274--281, May 1992.
     
     
306. T. B. Deng, Masayuki Kawamata, and Tatsuo Higuchi.
     "Design of two-dimensional recursive digital filters based on the optimal decomposition of magnitude specifications."
     Recent Advances in Mathematical Theory of Systems,Control,Networks and Signal Processing Proc. of the International Symposium, Vol. MTNS-91, pp. 153--158, June 1992.
     
     
307. 春日健, 亀山充隆, 樋口龍雄.
     "ロバストフォールトトレラント並列演算回路の構成."
     計測自動制御学会論文集, Vol. 28, No. 4, pp. 528--535, April 1992.
     
     
308. Michitaka Kameyama, Tadao Amada, and Tatsuo Higuchi.
     "Highly parallel collision detection processor for intelligent robots."
     IEEE Journal of Solid-State Circuits, Vol. 27, No. 4, pp. 500--506, April 1992.
     
     
309. 亀山充隆, 青木孝文, 樋口龍雄.
     "ポストバイナリ−VLSIシステム： 無配線コンピュ−ティ ングシステム."
     電子情報通信学会誌, Vol. 75, No. 4, pp. 400--406, April 1992.
     
     
310. 青木孝文, 弓仲康史, 樋口龍雄.
     "周波数モード集合論理に基づく超多値論理回路網の構成."
     電子情報通信学会論文誌(D-I), Vol. J75-D-I, No. 4, pp. 210--220, April 1992.
     
     
311. Takahiro Hanyu, Tomoya Kodama, and Tatsuo Higuchi.
     "Digit-pipelined on-chip clique-finding VLSI processor for real-time 3-D object recognition."
     Electronics Letter, Vol. 28, No. 8, pp. 722--724, April 1992.
     
     
312. 恒川佳隆, 川又政征, 樋口龍雄.
     "状態空間ディジタルフィルタのブロック実現における係数感度最小化."
     電子情報通信学会論文誌(A), Vol. J75-A, No. 3, pp. 506--515, March 1992.
     
     
313. Takahiro Hanyu, Kouichi Takeda, and Tatsuo Higuchi.
     "Dynamically rule-programmable VLSI processor for fully-parallel inference."
     Electronics Letters, Vol. 28, No. 7, pp. 695--697, March 1992.
     
     
314. Masayuki Kawamata, Hiroaki Kanbara, and Tatsuo Higuchi.
     "Determination of IFS codes using scale-space correlation functions."
     IEEE Int. Workshop on Intelligent Signal Processing and Communication Systems, pp. 219--233, March 1992.
     
     
315. 亀山充隆, 樋口龍雄.
     "無配線バイオコンピューティングシステム."
     数理科学, Vol. 344, pp. 33--39, February 1992.
     
     

     1991

316. Michitaka Kameyama, Takao Matsumoto, and Tatsuo Higuchi.
     "A special-purpose LSI for inverse kinematics computation."
     IEICE Trans., Vol. E74, No. 11, pp. 3829--3837, November 1991.
     
     
317. Somchai Kittichaikoonkit, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of a matrix multiply-addition VLSI processor for robot inverse dynamics computation."
     IEICE Trans., Vol. .E74, No. 11, pp. 3819--3828, 1991.
     
     
318. Somchai Kittichaikoonkit, Michitaka Kameyama, and Tatsuo Higuchi.
     "High-performance VLSI processor for robot inverse dynamics computation."
     IEEE Int. Conf. on Computer Design, pp. 608--611, 1991.
     
     
319. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(vi・完) −多次元離散フーリエ変換−."
     電子情報通信学会誌, Vol. 74, No. 10, pp. 1098--1108, 1991.
     
     
320. 阿部茂樹, 亀山充隆, 樋口龍雄.
     "耐同時フォールト性を有する多重化冗長システムの最適設計."
     電子情報通信学会論文誌, Vol. J74-D-I, No. 9, pp. 675--682, September 1991.
     
     
321. 青木孝文, 亀山充隆, 樋口龍雄.
     "集合論理回路網に基づく超多値バイオ情報処理システムの構成."
     電子情報通信学会論文誌(D-I), Vol. J74-D-I, No. 9, pp. 604--612, September 1991.
     
     
322. 恒川佳隆, 志田純一, 川又政征, 樋口龍雄.
     "滞在時間がきわめて小さい状態空間ディジタルフィルタ用 高並列VLSIア−キテクチャ."
     計測自動制御学会論文集, Vol. 27, pp. 1034--1040, September 1991.
     
     
323. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(v) −多次元ディジタルフィ ルタの設計−."
     電子情報通信学会誌, Vol. 74, No. 9, pp. 957--966, September 1991.
     
     
324. Masayuki Kawamata, Takehiko Kagoshima, and Tatsuo Higuchi.
     "Design of three-dimensional recursive digital filters via decomposition."
     Proc. of the Seventh Workshop on Mutidimensional Signal Processing, Vol. 3, No. 15, September 1991.
     
     
325. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(iv) −多次元ディジタルフィ ルタの設計−."
     電子情報通信学会誌, Vol. 74, No. 8, pp. 847--856, aug 1991.
     
     
326. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(iii) −多次元ディジタルフィ ルタの設計−."
     電子情報通信学会誌, Vol. 74, No. 7, pp. 757--762, jul 1991.
     
     
327. 恒川佳隆, 志田純一, 川又政征, 樋口龍雄.
     "状態空間ディジタルフィルタのブロック状態実現における 係数感度解析."
     電子情報通信学会論文誌, Vol. J74-A, No. 7, pp. 996--1005, July 1991.
     
     
328. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(ii) −多次元ディジタルシ ステム−."
     電子情報通信学会誌, Vol. 74, No. 6, pp. 603--610, 1991.
     
     
329. 恒川佳隆, 志田純一, 川又政征, 樋口龍雄.
     "ブロック状態実現を用いた状態空間ディジタルフィルタ用 高性能ＶＬＳＩアーキテクチャ."
     電子情報通信学会論文誌, Vol. J74-A, No. 6, pp. 848--856, June 1991.
     
     
330. Masayuki Kawamata, Yoshihisa Uno, and Tatsuo Higuchi.
     "Sensitivity minimization of digital controllers via frequency-weighted balancing."
     IEEE Int. Symp. on CAS, pp. 2419--2422, June 1991.
     
     
331. T.-B. Deng Masayuki Kawamata and Tatsuo Higuchi.
     "Design of two-demensional recursive digital filters based of the optimal decomposition of magnitude specifications."
     Int. Symp. on Circuits and Systems, Vol. 1, pp. 614--617, jun 1991.
     
     
332. 川又政征, 樋口龍雄.
     "多次元ディジタル信号処理の基礎(i) −多次元信号−."
     電子情報通信学会誌, Vol. 74, No. 5, pp. 488--496, may 1991.
     
     
333. Michitaka Kameyama, Masahiro Nomura, and Tatsuo Higuchi.
     "Arithmetic semicustom VLSI based on module array structure."
     Symposium on VLSI Circuits, Vol. 11-2, pp. 101--102, may 1991.
     
     
334. Michitaka Kameyama, Tadao Amada, and Tatsuo Higuchi.
     "Highly parallel collision detection VLSI processor for intelligent robots."
     Symposium on VLSI Circuits, Vol. 4-1, pp. 29--30, may 1991.
     
     
335. Takafumi Aoki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of interconnection-free biomolecular computing system."
     Proc. Int. Symp. on Multiple-Valued Logic, pp. 173--180, May 1991.
     
     
336. Takahiro Hanyu and Tatsuo Higuchi.
     "A floating-gate-MOS-based multiple-valued associative memory."
     Proc. 21st Int. Symp. on Multiple-Valued Logic, pp. 24--31, May 1991.
     
     
337. Takahiro Hanyu, Yasushi Kojima, and Tatsuo Higuchi.
     "A multiple-valued logic array VLSI based on two-transistor delta literal circuit and its application to real-time reasoning system."
     Proc. 21st Int. Symp. on Multiple-Valued Logic, pp. 16--23, May 1991.
     
     
338. Yasushi Yuminaka, Takafumi Aoki, and Tatsuo Higuchi.
     "Design of a set logic network based of frequency multiplexing and its application to image processing."
     Proc. 21st Int. Symp. on Multiple-Valued Logic, pp. 8--15, May 1991.
     
     
339. Takahiro Hanyu, Hiroto Ishii, and Tatsuo Higuchi.
     "Design of a high-density multi-level matching array chip for associative processing."
     IEICE Trans., Vol. E74, No. 4, pp. 918--928, 1991.
     
     
340. 亀山充隆, 野村昌弘, 樋口龍雄.
     "Ｓｉｇｎｅｄ−Ｄｉｇｉｔ数演算多値モジュ−ルアレ−の構成."
     電子情報通信学会論文誌(A), Vol. J74-A, No. 2, pp. 296--303, February 1991.
     
     

     1990

341. 三浦真樹, 亀山充隆, 樋口龍雄.
     "離散時間ニュ−ラルネットワ−クに基づく連立１次方程式求解並列処理システム."
     計測自動制御学会論文集, Vol. 26, No. 12, pp. 1443--1448, 1990.
     
     
342. Takafumi Aoki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Interconnection-free biomolecular computing system based on a set-theoretic switching algebra."
     Extended Abstracts of the 3rd Int. Symp. on Bioelectronic and Molecular Electronic Devices, pp. 69--70, December 1990.
     
     
343. 亀山充隆, 樋口龍雄.
     "知的フォ−ルトトレランス."
     電子情報通信学会誌, Vol. 73, No. 14, pp. 1233--1236, November 1990.
     
     
344. Takafumi Aoki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Interconnection-free set logic network based on a bio-device model."
     Electronics Letters, Vol. 26, No. 14, pp. 1015--1016, July 1990.
     
     
345. Michitaka Kameyama, Masahiro Nomura, and Tatsuo Higuchi.
     "Modular design of multiple-valued arithmetic VLSI system using signed-digit number system."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 355--362, May 1990.
     
     
346. Takahiro Hanyu and Tatsuo Higuchi.
     "Design of a high-density multiple-valued content-addressable memory based on floating-gate MOS devices."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 18--23, May 1990.
     
     
347. Takeshi Kasuga, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of robust-fault-tolerant arithmetic circuits and their application."
     IEEE Int. Symp. on Circuits and Systems, pp. 2748--2751, May 1990.
     
     
348. 亀山充隆, 魏書剛, 樋口龍雄.
     "多値ＲＳＡ暗号処理ＶＬＳＩの性能評価."
     電子情報通信学会論文誌(D-I), Vol. J73D-I, No. 5, pp. 484--491, May 1990.
     
     
349. 樋口龍雄, 川又政征.
     "多次元ディジタル信号処理の基礎."
     コンピュートロール, Vol. 30, pp. 3--14, May 1990.
     
     
350. Shoji Kawahito, Michitaka Kameyama, and Tatsuo Higuchi.
     "Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI system."
     IEEE Journal of Solid-State Circuits, Vol. 25, No. 1, pp. 125--131, Feb 1990.
     
     
351. 春日健, 亀山充隆, 樋口龍雄.
     "ロバストフォールトトレラント乗算器の構成."
     電子情報通信学会論文誌, Vol. J73D-I, No. 2, pp. 141--147, February 1990.
     
     
352. Makoto Ohki, Masayuki Kawamata, and Tatsuo Higuchi.
     "Efficient design of two-dimensional separable denominator digital filters using symmetries."
     IEEE Trans. on Circuits and Systems, Vol. 37, No. 1, pp. 114--120, January 1990.
     
     
353. Masami Iwatsuki, Masayuki Kawamata, and Tatsuo Higuchi.
     "Statistial sensitivity and minimum sensitivity structures with fewer coefficients in discrete time linear systems."
     IEEE Trans. on Circuits and Systems, Vol. 37, No. 1, pp. 72--80, January 1990.
     
     

     1989

354. 宋奎翼, 亀山充隆, 樋口龍雄.
     "相補型パスゲ−トに基づく４値順序回路の構成."
     電子情報通信学会論文誌(D-I), Vol. J72D-I, No. 12, pp. 837--844, December 1989.
     
     
355. 大木真, 川又政征, 樋口龍雄.
     "３次元ディジタルフィルタの並列DSP実現."
     電子情報通信学会論文誌, Vol. J72-A, No. 11, pp. 1919--1922, November 1989.
     
     
356. Michitaka Kameyama, Tsutomu Sekibe, and Tatsuo Higuchi.
     "Highly parallel residue arithmetic chip based on multiple-valued bidirectional current-mode logic."
     IEEE Journal of Solid-State Circuits, Vol. 24, No. 5, pp. 1404--1411, Oct 1989.
     
     
357. Koji Kobayashi, Michitaka Kameyama, and Tatsuo Higuchi.
     "New communication network protocol for cell level factory automation and its LSI implementation."
     Proc. of the IFIP Conf. on Computer Applications in Production and Engineering, pp. 565--572, Oct 1989.
     
     
358. Takahiro Hanyu and Tatsuo Higuchi.
     "High-density quaternary logic array chip for knowledge information processing systems."
     IEEE Journal of Solid-State Circuits, Vol. 24, No. 4, pp. 916--921, Aug 1989.
     
     
359. 亀山充隆, 青木孝文, 樋口龍雄.
     "バイオ素子モデルに基づく超多値・高並列論理回路網の構成."
     電子情報通信学会論文誌(D-I), Vol. J72D-I, No. 7, pp. 535--544, July 1989.
     
     
360. 春日健, 亀山充隆, 樋口龍雄.
     "分散的符号化に基づくフォ−ルトトレラント演算回路の構成とその評価."
     電子情報通信学会論文誌, Vol. J72D-I, No. 6, pp. 516--525, June 1989.
     
     
361. 鄭立, 亀山充隆, 樋口龍雄.
     "知的誤り検出に基づくデジタル制御システムの安全性評価."
     電子情報通信学会論文誌, Vol. J72-D-I, No. 6, pp. 498--506, June 1989.
     
     
362. 川人祥二, 亀山充隆, 樋口龍雄.
     "双方向電流モ−ド多値並列乗算器の高性能化."
     電子情報通信学会論文誌(C), Vol. J72-C-II, No. 5, pp. 434--441, May 1989.
     
     
363. Takafumi Aoki, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of a highly parallel set logic network based on a bio-device model."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 360--367, May 1989.
     
     
364. Michitaka Kameyama, Takao Matsumoto, Hideki Egami, and Tatsuo Higuchi.
     "Implementation of a high performance LSI for inverse kinematics computation."
     IEEE Conf. on Robotics and Automation, pp. 757--762, May 1989.
     
     
365. Michitaka Kameyama, Tsutomu sekibe, and Tatsuo Higuchi.
     "Ultra-highly parallel residue arithmetic VLSI system."
     Symposium on VLSI Circuits, pp. 127--128, May 1989.
     
     
366. Shoji Kawahito, Michitaka Kameyama, and Tatsuo Higuchi.
     "High-performance multiple-valued radix-2 signed-digit multiplier and its application."
     Symposium on VLSI Circuits, pp. 125--126, May 1989.
     
     
367. 大木真, 川又政征, 樋口龍雄.
     "インパルス応答仕様の外積展開に基づく３次元ディジタル フィルタの設計."
     電子情報通信学会論文誌, Vol. J72-A, No. 4, pp. 648--655, April 1989.
     
     
368. 川又政征, 中陦修, 樋口龍雄.
     "状態空間法に基づくロボットア−ムの感度解析."
     計測自動制御学会論文集, Vol. 25, No. 2, pp. 194--199, February 1989.
     
     
369. 亀山充隆, 樋口龍雄.
     "多値情報処理システムとＶＬＳＩ化."
     電子情報通信学会論文誌(A), Vol. J72-A, No. 2, pp. 198--207, February 1989.
     
     

     1988

370. 川又政征, 樋口龍雄.
     "ディジタルシステム制御における量子化誤差."
     計測と制御, Vol. 27, No. 12, pp. 1091--1097, Dec 1988.
     
     
371. 亀山充隆, 魏書剛, 樋口龍雄.
     "Ｓｉｇｎｅｄ−Ｄｉｇｉｔ数多値演算回路に基づくＲＳＡ 暗号処理プロセッサの構成."
     電子情報通信学会論文誌(D), Vol. J71-D, No. 12, pp. 2659--2668, December 1988.
     
     
372. 亀山充隆, 樋口龍雄.
     "多値情報処理とその応用."
     システムと制御, Vol. 32, No. 10, pp. 575--583, October 1988.
     
     
373. 岩月正見, 川又政征, 樋口龍雄.
     "連続時間線形システムにおける統計的感度."
     計測自動制御学会論文集, Vol. 24, No. 10, pp. 1064--1070, October 1988.
     
     
374. 羽生貴弘, 樋口龍雄.
     "多値連想メモリの構成."
     電子情報通信学会論文誌(D), Vol. J71-D, No. 8, pp. 1502--1510, August 1988.
     
     
375. 岩月正見, 樋口龍雄.
     "あるクラスの伝達関数を有する広義の平衡形実現とその低 感度性."
     システム制御情報学会誌, Vol. 1, No. 3, pp. 77--83, Aug 1988.
     
     
376. 亀山充隆, 樋口龍雄.
     "ロボットとＶＬＳＩコンピュータ."
     日本ロボット学会誌, Vol. 6, No. 4, pp. 332--338, Aug 1988.
     
     
377. 鄭立, 亀山充隆, 樋口龍雄.
     "安全性を考慮した知的誤り検出に基づく高信頼化ディジタ ル制御システム."
     計測自動制御学会論文集, Vol. 24, No. 8, pp. 867--874, Aug 1988.
     
     
378. 岩月正見, 川又政征, 樋口龍雄.
     "連続時間線形システムにおける周波数感度と感度最小構造."
     計測自動制御学会論文集, Vol. 24, No. 8, pp. 831--836, August 1988.
     
     
379. Takahiro Hanyu and Tatsuo Higuchi.
     "High-density quaternary logic array chip for knowledge information processing systems."
     Symp. on VLSI Circuits, pp. 29--30, Aug 1988.
     
     
380. K. I. Sohng, Michitaka Kameyama, and Tatsuo Higuchi.
     "Quaternary complementary pass gate network and its application to image processing."
     Int. Workshop on Fuzzy System Applications, pp. 117--118, Aug 1988.
     
     
381. Shoji Kawahito, Michitaka Kameyama, and Tatsuo Higuchi.
     "Multiple-valued bidirectional current-mode technology and its applications."
     Int. Workshop on Fuzzy System Applications, pp. 112--113, Aug 1988.
     
     
382. 亀山充隆, 川人祥二, 樋口龍雄.
     "Ｓｉｇｎｅｄ−Ｄｉｇｉｔ数系に基づく双方向電流モ−ド 多値基本演算回路とその評価."
     電子情報通信学会論文誌(D), Vol. J71-D, No. 7, pp. 1189--1198, July 1988.
     
     
383. 川又政征, 樋口龍雄.
     "標本化と量子化の理論."
     コンピュ−トロ−ル, No. 23, pp. 11--16, Jul 1988.
     
     
384. Q. Zhao, Masayuki Kawamata, and Tatsuo Higuchi.
     "Controllability, observability and model reduction of separable denominator M-D systems."
     Trans. IEICE, Vol. E71, No. 5, pp. 505--513, May 1988.
     
     
385. 樋口龍雄.
     "ロボットエレクトロニクス　−知能ロボットを目指して."
     電子情報通信学会論文誌, Vol. 71, No. 5, pp. 502--504, May 1988.
     
     
386. Takahiro Hanyu and Tatsuo Higuchi.
     "Design of a highly parallel AI processor using new multiple-valued MOS devices."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 300--306, May 1988.
     
     
387. Michitaka Kameyama and Tatsuo Higuchi.
     "Prospects of multiple-valued bio-information processing systems."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 237--242, May 1988.
     
     
388. Michitaka Kameyama, Tsutomu Sekibe, and Tatsuo Higuchi.
     "Design of highly parallel residue arithmetic circuits based on multiple-valued bidirectional current-mode MOS technology."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 6--13, May 1988.
     
     
389. Michitaka Kameyama, Shoji Kawahito, and Tatsuo Higuchi.
     "A multiplier chip with multiple-valued bidirectional current-mode logic circuits."
     IEEE Computer, Vol. 21, No. 4, pp. 43--56, Apr 1988.
     
     
390. 堀江一宏, 亀山充隆, 樋口龍雄.
     "ＶＬＳＩ向き４値相補型パスゲ−ト回路網の構成."
     電子情報通信学会論文誌(D), Vol. J71-D, No. 4, pp. 636--643, April 1988.
     
     
391. 岩月正見, 樋口龍雄.
     "状態空間システムにおけるパラメ−タ数の少ない統計的感度最小構造の合成."
     電子情報通信学会論文誌, Vol. J71-A, No. 2, pp. 251--259, Feb 1988.
     
     
392. 亀山充隆, 江上秀樹, 樋口龍雄.
     "ロボット制御用超高速座標逆変換プロセッサの構成."
     日本ロボット学会誌, Vol. 6, No. 1, pp. 3--13, Feb 1988.
     
     
393. Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, and Haruyasu Yamada.
     "A 32 x 32-bit multiplier using multiple-valued MOS current-mode circuits."
     IEEE Journal of Solid-State Circuits, Vol. SC-23, No. 1, pp. 124--132, Feb 1988.
     
     

     1987

394. 亀山充隆, 鄭立, 樋口龍雄.
     "知識工学的手法に基づくフォ−ルトトレラントシステムの 構成とディジタル制御への応用."
     電子情報通信学会論文誌, Vol. J70-D, No. 12, pp. 2697--2707, December 1987.
     
     
395. Q. Zhao, Masayuki Kawamata, and Tatsuo Higuchi.
     "A unified approach to the minimization of quantization effects in separable denominator multi-dimensional digital filters."
     Trans. IEICE, Vol. E70, No. 11, pp. 1092--1095, November 1987.
     
     
396. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "Minimization of sensitivity of 2-D systems and its relation to 2-D balanced realizations."
     Trans. IEICE, Vol. E70, pp. 938--944, October 1987.
     
     
397. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "On controllability,observability,and minimality of 2-D separable denominator systems:a new approach based on the reduced-dimensional decomposition."
     IEEE Trans. on Circuits and Systems, Vol. CAS-34, No. 8, pp. 962--967, August 1987.
     
     
398. Tao Lin and Masayuki Kawamata and.
     "Design of 2-D separable-denominator digital filters based on the redused-dimensional decomposition."
     IEEE Trans.on Circuits and Systems, Vol. CAS-34, No. 8, pp. 934--941, August 1987.
     
     
399. 趙強福, 川又政征, 樋口龍雄.
     "分母分離型多次元ディジタルフィルタにおける丸め誤差の 解析と最小化."
     電子情報通信学会論文誌,, Vol. J70-A, No. 8, pp. 1126--1135, August 1987.
     
     
400. 樋口龍雄, 大木真, 川又政征.
     "３次元ＦＩＲディジタルフィルタの最適設計　−線形計画 法による設計法および対称性の利用による計算量の低減−."
     電子情報通信学会論文誌, Vol. J70-A, No. 7, pp. 1042--1050, July 1987.
     
     
401. 川又政征, 樋口龍雄.
     "ディジタルフィルタと線形システム理論."
     システムと制御, Vol. 31, No. 5, pp. 325--332, May 1987.
     
     
402. 赤嶺政巳, 樋口龍雄.
     "浮動小数点演算を用いたリミットサイクルのない演算誤差 最小ディジタルフィルタのクラスについて."
     電子情報通信学会論文誌, Vol. J70-A, No. 5, pp. 791--797, May 1987.
     
     
403. Takahiro Hanyu, Michitaka Kameyama, and Tatsuo Higuchi.
     "Quaternary gate array for pattern matching and its application to knowledge information processing system."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 181--187, May 1987.
     
     
404. Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, and Haruyasu Yamada.
     "A high-speed compact multiplier based on multiple-valued bi-directional current-mode circuits."
     Int. Symp. on Multiple-Valued Logic, pp. 172--180, May 1987.
     
     
405. Kazuhiro Horie, K. I. Sohng, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of a complementary pass gate network for a multiple-valued logic system."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 142--149, May 1987.
     
     
406. Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, and Haruyasu Yamada.
     "A 32 x 32 bit multiplier using multiple-valued MOS current-mode circuits."
     Symposium on VLSI Circuits, pp. 99--100, May 1987.
     
     
407. Masayuki Kawamata, Tao Lin, and Tatsuo Higuchi.
     "Minimization of sensitivity of 2-D state-space digital filters and its relation to 2-D balanced realizations."
     IEEE Int. Symp. on Circuits and Systems, pp. 710--713, May 1987.
     
     
408. Masayuki Kawamata and Tatsuo Higuchi.
     "Limit cycle-free 2-D separable denominator digital filters under any constant input conditions."
     Trans. IEICE, Vol. E70, No. 4, pp. 373--375, April 1987.
     
     
409. Q.Zhao, Masayuki Kawamata, and Tatsuo Higuchi.
     "Direct design of separable denominator 3-D state-space digital filters."
     Trans. IEICE, Vol. E70, No. 4, pp. 411--421, April 1987.
     
     
410. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "Decompositon of 2-D separable-denominator systems: Existence,uniqueness,and applications."
     IEEE Transactions on Circuits and Systems, Vol. CAS-34, No. 3, pp. 292--296, March 1987.
     
     
411. 黄席越, 亀山充隆, 樋口龍雄.
     "振幅制限がある場合の直流サ−ボモ−タの最短時間ディジタ ル制御システムの構成."
     電子情報通信学会論文誌, Vol. J70-D, No. 3, pp. 610--618, Mar 1987.
     
     
412. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "New necessary and sufficient conditions for local controllability and local observability of 2-D separable denominator systems."
     IEEE Trans. Automatic Control, Vol. AC-32, No. 3, pp. 254--256, March 1987.
     
     
413. 黄席越, 佐藤正喜, 亀山充隆, 樋口龍雄.
     "駆動電圧および電流に振幅制限がある場合の直流サ−ボモ −タの最短時間ディジタル制御システムの構成."
     計測自動制御学会論文集, Vol. 23, No. 3, pp. 260--267, Mar 1987.
     
     
414. Tao Lin, Masayuki Kawamata, and Tatsuo higuchi.
     "Design of 2-D digital filters with an arbitrary response and no overflow oscillations based on a new stability condition."
     IEEE Trans.on Circuits and Systems, Vol. CAS-34, No. 2, pp. 113--126, February 1987.
     
     
415. Michitaka Kameyama, Takahiro Hanyu, and Tatsuo Higuchi.
     "Design and implementation of quaternary NMOS integrated circuits for pipelined image processing."
     IEEE Journal of Solid-State Circuits, Vol. SC-22, No. 1, pp. 20--27, Feb 1987.
     
     
416. 羽生貴弘, 亀山充隆, 樋口龍雄.
     "高速パタ−ンマッチング用４値ゲ−トアレ−の構成."
     電子情報通信学会論文誌(D), Vol. J70-D, No. 2, pp. 493--496, February 1987.
     
     
417. 岩月正見, 川又政征, 樋口龍雄.
     "可制御性と可観測性に着目したロボットア−ムの性能評価."
     計測自動制御学会論文集, Vol. 23, No. 2, pp. 149--154, February 1987.
     
     
418. 亀山充隆, 黄席越, 中村利孝, 樋口龍雄.
     "操作量に振幅制限がある場合の最短時間ディジタル制御シ ステムの構成."
     計測自動制御学会論文集, Vol. 23, No. 2, pp. 123--128, Feb 1987.
     
     
419. 瑞慶覧長定, 安冨祖忠信, 亀山充隆, 樋口龍雄.
     "微小電力CMOS４値記憶回路の構成."
     電子情報通信学会論文誌, Vol. J70-D, No. 1, pp. 42--49, Jan 1987.
     
     

     1986

420. 林涛, 川又政征, 樋口龍雄.
     "リミットサイクルのない２次元状態空間ディジタルフィル タの周波数領域仕様に対する最適設計法."
     計測自動制御学会論文誌, Vol. J69-A, No. 11, pp. 1351--1361, November 1986.
     
     
421. Q. Zhao, Masayuki Kawamata, and Tatsuo Higuchi.
     "A new property of optimal realizations of CRSD 2-D digital filters and its application to the direct spatial-domain design."
     Trans. IEICE, Vol. E69, No. 10, pp. 1084--1092, October 1986.
     
     
422. 趙強福, 川又政征, 樋口龍雄.
     "ディジタルフィルタの平衡形実現と最適実現の等価関係お よびその時間領域設計への応用."
     計測自動制御学会論文集, Vol. 22, No. 10, pp. 1037--1042, October 1986.
     
     
423. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "Frequency dependent lyapunov equations for 2-D observability gramian and controllability gramian."
     Trans. IEICE, Vol. E69, No. 8, pp. 827--829, August 1986.
     
     
424. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "A unified study on the roundoff noise in 2-D state space digital filters."
     IEEE Trans. on Circuits and Systems, Vol. CAS-33, pp. 724--730, July 1986.
     
     
425. 亀山充隆, 樋口龍雄.
     "多値演算回路と符号化."
     計測と制御, Vol. 25, No. 6, pp. 535--539, June 1986.
     
     
426. 川人祥二, 亀山充隆, 樋口龍雄.
     "ＶＬＳＩ向き４値Ｓｉｇｎｅｄ−Ｄｉｇｉｔ数多値演算回 路の構成."
     電子通信学会論文誌(D), Vol. J69-D, No. 5, pp. 679--689, May 1986.
     
     
427. 羽生貴弘, 亀山充隆, 樋口龍雄.
     "４値理論に基づくＮＭＯＳ画像処理プロセッサの構成と試 作."
     電子通信学会論文誌, Vol. J69-D, No. 5, pp. 667--678, May 1986.
     
     
428. Shoji Kawahito, Michitaka Kameyama, and Tatsuo Higuchi.
     "VLSI-oriented bi-directional current-mode arithmetic circuits based on the radix-4 signed-digit number system."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 70--77, May 1986.
     
     
429. Masayuki Kawamata, Q.Zhao, and Tatsuo Higuchi.
     "A unified design method of 2-D separable denominator digital filters using system balancing concept."
     IEEE Int. Symp. on Circuits and Systems, pp. 13--16, May 1986.
     
     
430. Masayuki Kawamata and Tatsuo Higuchi.
     "Synthesis of 2-D separable denominator digital filters with minimum roundoff noise and no overflow oscillations."
     IEEE Trans. on Circuits and Systems, Vol. CAS-33, No. 4, pp. 365--372, April 1986.
     
     
431. Q.Zhao, Masayuki Kawamata, and Tatsuo Higuchi.
     "A unified design method of state-space digital filters using system balancing concept."
     IEEE Int. Conf. on Acoustics, Speech and Signal Processing, pp. 2579--2582, April 1986.
     
     
432. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "A unified study on the roundoff noise in 2-D state space digital filters."
     IEEE Int. Conf. on Acoustics,Speech and Signal Processing, pp. 1045--1048, April 1986.
     
     
433. Masami Iwatsuki, Masayuki Kawamata, and Tatsuo Higuchi.
     "Synthesis of minimum sensitivity structures in linear systems using controllability and observability measures."
     IEEE Int. Conf. on Acoustics,Speech and Signal Processing, pp. 501--504, April 1986.
     
     
434. 樋口龍雄, 川又政征.
     "VLSI向き高速信号処理アルゴリズム."
     精密工学会誌, Vol. 52, No. 4, pp. 631--634, Apr 1986.
     
     
435. 樋口龍雄, 川又政征.
     "ディジタルフィルタの構造とロバストネス."
     コンピュ−トロ−ル, No. 13, pp. 94--101, Jan 1986.
     
     
436. 亀山充隆, 樋口龍雄.
     "ＬＳＩ向きロボット制御用プロッセサ."
     計測と制御, Vol. 25, No. 1, pp. 30--36, Jan 1986.
     
     

     1985

437. 川又政征, 樋口龍雄.
     "分母分離型２次元ディジタルフィルタにおける丸め誤差最小構造の合成."
     電子通信学会論文誌, Vol. J68-A, No. 11, pp. 1200--1208, November 1985.
     
     
438. 川又政征, 岩月正見, 樋口龍雄.
     "線形システムにおける感度最小構造としての平衡形実現."
     計測自動制御学会論文集, Vol. 21, No. 9, pp. 900--906, Sep 1985.
     
     
439. Masayuki Kawamata and Tatsuo Higuchi.
     "A unified approach to the optimal synthesis of fixed-point state-space digital filters."
     IEEE Trans. on ASSP, Vol. ASSP-33, No. 4, pp. 911--920, August 1985.
     
     
440. O.Adegbenro, Michitaka Kameyama, and Tatsuo Higuchi.
     "A VLSI-oriented pipelined digital signal processor using shift resister based residue arithmetic circuits."
     Int. Conf. on Very Large Scale Integration, pp. 119--128, Aug 1985.
     
     
441. 苫米地宣裕, 亀山充隆, 樋口龍雄.
     "パルス列剰余数演算回路に基づくLSI向きディジタル信号処理システムの構成法."
     電子通信学会論文誌, Vol. J68-D, No. 8, pp. 1457--1464, Aug 1985.
     
     
442. 亀山充隆, 樋口龍雄, 今野淳一, 高須賀馨.
     "超高速パイプラインＦＦＴプロセッサの構成."
     計測自動制御学会論文集, Vol. 21, No. 7, pp. 725--732, Jul 1985.
     
     
443. 樋口龍雄.
     "ディジタル信号処理と線形システム理論."
     計測と制御, Vol. 24, No. 7, pp. 653--654, Jul 1985.
     
     
444. 瑞慶覧長定, 安冨祖忠信, 亀山充隆, 樋口龍雄.
     "低消費電力４値CMOS論理回路の構成."
     電子通信学会論文誌, Vol. J68-D, No. 6, pp. 1234--1241, Jun 1985.
     
     
445. 川又政征, 河田悦生, 樋口龍雄.
     "分母分離型２次元ディジタルフィルタにおける丸め誤差の解析."
     電子通信学会論文誌, Vol. J68-A, No. 12, pp. 573--580, June 1985.
     
     
446. Tao Lin, Masayuki Kawamata, and Tatsuo Higuchi.
     "Optimal design of 2-D state space digital filters without limit cycles."
     IEEE Int. Symp. on Circuits and Systems, pp. 1595--1598, June 1985.
     
     
447. O.Adegbenro, Michitaka Kameyama, and Tatsuo Higuchi.
     "An efficient pipelined digital signal processor based on new pulse-train residue arithmetic circuits."
     IEEE Int. Symp. on Circuits and Systems, pp. 1391--1394, Jun 1985.
     
     
448. Masayuki Kawamata and Tatsuo Higuchi.
     "Synthesis of 2-D separable denominator digital filters with minimum roundoff noise and no overflow oscillations."
     Int. Symp. on Circuits and Systems, pp. 1087--1090, Jun 1985.
     
     
449. Michitaka Kameyama, Takahiro Hanyu, Masayoshi Esashi, Tatsuo Higuchi, and Takayasu Ito.
     "Implementation of quaternary NMOS integrated circuits for pipelined image processing."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 226--232, May 1985.
     
     
450. Chotei Zukeran, Chushin Afuso, Michitaka Kameyama, and Tatsuo Higuchi.
     "Design of new low-power quaternary CMOS logic circuits based on multiple ion implants."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 84--90, May 1985.
     
     
451. 亀山充隆, 樋口龍雄.
     "多値論理システムとその応用."
     電子通信学会誌, Vol. 68, No. 5, pp. 515--521, May 1985.
     
     
452. 亀山充隆, 樋口龍雄.
     "マイクロコンピュ−タシステムの高信頼化."
     計測と制御, Vol. 24, No. 4, pp. 319--324, Apr 1985.
     
     
453. Michitaka Kameyama, Takahiro Hanyu, Masayoshi Esashi, and Tatsuo Higuchi.
     "An NMOS pipelined image processor using quaternary logic."
     Int. Solid-State Circuits Conf., pp. 86--87, Feb 1985.
     
     
454. Michitaka Kameyama, O.Adegbenro, and Tatsuo Higuchi.
     "A VLSI-oriented digital signal processor based on pulse-train residue arithmetic circuit with a multiplier."
     Trans. IEICE, Vol. E68, No. 1, pp. 14--21, Jan 1985.
     
     

     1984

455. 樋口龍雄, 林涛, 川又政征.
     "２次元離散空間システムの新しい安定条件に基づく２次元 ディジタルフィルタの最適設計法."
     電子通信学会論文誌, Vol. J67-A, No. 12, pp. 1168--1175, December 1984.
     
     
456. Hiroshi Sasahara, Masauiki Kawamata, and Tatsuo Higuchi.
     "Design of microprocessor-based LQG control systems with minimum quantization error."
     Industrial Electronics,Control and Instrumentation, pp. 533--538, October 1984.
     
     
457. 樋口龍雄, 堀川広二, 川又政征.
     "有限語長カルマンフィルタにおけるフィルタ構造の合成法."
     計測自動制御学会論文集, Vol. 20, No. 10, pp. 886--893, October 1984.
     
     
458. 亀山充隆, 樋口龍雄, 江刺正喜, 羽生貴弘.
     "４値Ｔゲ−トのＮＭＯＳ集積回路."
     電子通信学会論文誌, Vol. J67-D, No. 9, pp. 1064--1065, September 1984.
     
     
459. Masayuki Kawamata and Tatsuo Higuchi.
     "On the absence of limit cycles in class of state-space digital filters which contains minimum noise realizations."
     IEEE Trans. on ASSP, Vol. ASSP-32, No. 4, pp. 928--930, August 1984.
     
     
460. Michitaka Kameyama and Tatsuo Higuchi.
     "A new architecture of a pipelined image processor based quaternary logic circuits."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 92--97, May 1984.
     
     
461. Masami Akamine and Tatsuo Higuchi.
     "State-space approach to synthesis of minimum quantization error digital filter using floating-point arithmetic."
     IEEE Int. Symp. on Circuits and Systems, pp. 1002--1005, May 1984.
     
     

     1983

462. 樋口龍雄, 川又政征.
     "状態空間ディジタルフィルタの有限語長実現問題."
     計測と制御, Vol. 22, No. 12, pp. 991--1004, December 1983.
     
     
463. 赤嶺政巳, 樋口龍雄.
     "浮動小数点演算を用いた量子化誤差最小ディジタルフィルタの合成."
     電子通信学会論文誌, Vol. J66-A, No. 10, pp. 895--902, Oct 1983.
     
     
464. 苫米地宣裕, 亀山充隆, 樋口龍雄.
     "多値論理に基づくパルス列剰余数演算回路とディジタル信号処理への応用."
     電子通信学会論文誌, Vol. J66-D, No. 8, pp. 939--946, Aug 1983.
     
     
465. Hiroaki Niitsuma, Noriaki Chubachi, Michitaka Kameyama, Tatsuo Higuchi, and H. Sekine.
     "Automatic AE spectrum analyzer using a new pipelined FFT processor."
     Acoustic Emission from Reinforced Composites, pp. 1--8, Jul 1983.
     
     
466. Michitaka Kameyama, K. Suzuki, and Tatsuo Higuchi.
     "Image processing algorithm for a multiple-valued array processor."
     Int. Symp. on Multiple-Valued Logic, pp. 236--241, May 1983.
     
     
467. Nobuhiro Tomabechi, Michitaka Kameyama, and Tatsuo Higuchi.
     "Pulse-train residue arithmetic circuit using multiple-valued charge-coupled devices and its application to digital filter."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 146--151, May 1983.
     
     
468. Masayuki Kawamata and Tatsuo Higuchi.
     "Synthesis of limit cycle-free state-space digital filters with minimum coefficient quantization error."
     IEEE Int. Symp. on Circuits and Systems, pp. 827--830, May 1983.
     
     
469. 苫米地宣裕, 亀山充隆, 樋口龍雄.
     "パルス列剰余数演算回路を用いたディジタル信号処理システムの高信頼化."
     電子通信学会論文誌, Vol. J66-D, No. 3, pp. 340--347, Mar 1983.
     
     
470. 鹿股昭雄, 高橋, 樋口龍雄.
     "耐同時故障性を有する相補的論理・２重化マイクロコンピュー タシステムの信頼性評価."
     電子通信学会論文誌, Vol. J66-D, No. 3, pp. 267--273, Mar 1983.
     
     
471. 樋口龍雄, 赤嶺政巳.
     "浮動小数点演算を用いたディジタルフィルタの状態方程式 に基づく量子化誤差の解析."
     電子通信学会論文誌, Vol. J66-A, No. 3, pp. 186--193, Mar 1983.
     
     
472. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Conversion factors from walsh coefficients to fourier coefficients."
     IEEE Trans. on ASSP, Vol. ASSP-31, No. 1, pp. 231--232, February 1983.
     
     
473. Masayuki Kawamata and Tatsuo Higuchi.
     "A systematic approach to synthesis of limit cycle-free digital filters."
     IEEE Trans. on ASSP, Vol. ASSP-31, No. 1, pp. 212--214, February 1983.
     
     
474. Akio Kanomata, T. Takahashi, and Tatsuo Higuchi.
     "Highly reliable microcomputer based on complementary duplication for control applications."
     Int. Conf. on Fault-Tolerant Systems and Diagonostics, pp. 189--195, Feb 1983.
     
     
475. Tatsuo Higuchi.
     "Fault tolerance in digital signal processors."
     Int. Conf. on Fault-Tolerant Systems and Diagnostics, pp. 181--187, Feb 1983.
     
     

     1982

476. Hiroaki Niitsuma, Noriaki Chubachi, Michitaka Kameyama, and Tatsuo Higuchi.
     "Real-time AE spectrum analyzer using a new pipeline FFT processor."
     Acoustic Emission Symposium, pp. 144--154, nov 1982.
     
     
477. 鹿股昭雄, 樋口龍雄.
     "故障注入機構を有するフォ−ルトトレラントシステムの信頼度評価システム."
     計測自動制御学会論文集, Vol. 18, No. 6, pp. 571--575, Jun 1982.
     
     
478. Michitaka Kameyama and Tatsuo Higuchi.
     "Multiple-valued logic and special-purpose processors:overview and future."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 289--292, may 1982.
     
     
479. Nobuhiro Tomabechi, Michitaka Kameyama, and Tatsuo Higuchi.
     "Efficient residue arithmetic circuit using multiple-valued ring counters and its application to digital signal processing."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 107--112, May 1982.
     
     
480. Michitaka Kameyama and Tatsuo Higuchi.
     "A new digital image processor using multiple-valued logic."
     IEEE Int. Symp. on Multiple-Valued Logic, pp. 8--16, May 1982.
     
     
481. 亀山充隆, 樋口龍雄.
     "整数計画法を用いた多値Tゲ−ト回路網の合成."
     電子通信学会論文誌, Vol. J65-D, No. 3, pp. 410--417, Mar 1982.
     
     
482. 苫米地宣裕, 亀山充隆, 樋口龍雄.
     "剰余数系に基づくパルス列演算回路とディジタルフィルタへの応用."
     電子通信学会論文誌, Vol. J65-D, No. 2, pp. 147--154, Feb 1982.
     
     

     1981

483. 川又政征, 樋口龍雄.
     "ディジタルフィルタの統計的係数感度解析に関する統一的考察."
     電子通信学会論文誌, Vol. J64-A, No. 12, pp. 1042--1049, December 1981.
     
     
484. 川又政征, 樋口龍雄.
     "状態方程式に基づくディジタルフィルタの合成理論."
     計測自動制御学会論文集, Vol. 17, No. 7, pp. 735--741, October 1981.
     
     
485. Michitaka kameyama and Tatsuo Higuchi.
     "Highly reliable digital signal processor with simultaneous-failure tolerance."
     Int. Conf. on Fault-Tolerant Systems and Diagnostics, pp. 26--31, Sep 1981.
     
     
486. Michitaka Kameyama and Tatsuo Higuchi.
     "Signed-digit arithmetic circuits based on mutiple-valued logic and its applications."
     IEEE Int. Symp. on Mutiple-Valued Logic, pp. 41--47, May 1981.
     
     
487. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Another discrete Fourier transform computation with multiplication via the Walsh transform."
     IEEE Int. Conf. on ASSP, pp. 306--309, Mar 1981.
     
     
488. 鹿股昭雄, 樋口龍雄.
     "マイクロプログラム方式による制御用マイクロコンピュータシステムの高信頼化."
     電子通信学会論文誌, Vol. J64-D, No. 2, pp. 174--175, Feb 1981.
     
     
489. 三浦守, 千葉, 志田純一, 樋口龍雄.
     "剰余数系に基づくパルス列信号処理用磁気演算モジュ−ル."
     計測自動制御学会論文集, Vol. 17, No. 1, pp. 105--110, Feb 1981.
     
     

     1980

490. 川又政征, 竹尾浩, 樋口龍雄.
     "リミットサイクルのないディジタルフィルタの状態方程式 に基づく合成法."
     電子通信学会論文誌, Vol. 63-A, No. 12, pp. 870--877, December 1980.
     
     
491. 樋口龍雄.
     "隣接分野との交流−制御理論とディジタル信号処理."
     計測と制御, Vol. 19, No. 12, pp. 1123--1128, December 1980.
     
     
492. 藤原, 樋口龍雄.
     "ディジタルフィルタへの応用."
     エレクトロニクスダイジェスト, No. 252, pp. 43--50, September 1980.
     
     
493. Michitaka Kameyama and Tatsuo Higuchi.
     "Design of radix 4 signed-digit arithmetic circuits for digital filtering."
     Int. Symp. on Multiple-Valued Logic, pp. 272--277, June 1980.
     
     
494. H. Kasuya and Tatsuo Higuchi.
     "Speech and digital processing activities in japan."
     The Newsletter of the IEEE ASSP Society, No. 5, pp. 14--17, June 1980.
     
     
495. Masayuki Kawamata and Tatsuo Higuchi.
     "A sufficient condition for absence of overflow oscillations in arbitrary digital filters based on the element equations."
     IEEE Int. Conf. on ASSP, pp. 85--88, April 1980.
     
     
496. 大友, 呉, 大内, 樋口龍雄.
     "磁心を用いた低周波ディジタルフィルタ用長時間ホールド 回路."
     システムと制御, Vol. 24, No. 2, pp. 109--114, February 1980.
     
     
497. Michitaka Kameyama and Tatsuo Higuchi.
     "Design of dependent-failure-tolerant microcomputer system using triple-modular redundancy."
     IEEE Jour. Solid State Circuits, Vol. SC-15, No. 1, pp. 138--142, February 1980.
     
     
498. 樋口龍雄.
     "多値論理システムの最近の動向."
     数理科学, Vol. 18, No. 2, pp. 55--60, February 1980.
     
     
499. 樋口龍雄, 川又政征.
     "ディジタルフィルタのパイプライン化に関するグラフ理論考察."
     電子通信学会論文誌, Vol. 63-D, No. 2, pp. 145--152, February 1980.
     
     
500. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "A new delay line for discrete analog-signal-processing devices based on IC monostable multivibrators."
     IEEE Trans. ASpSP, Vol. ASSP-28, No. 1, pp. 112--114, February 1980.
     
     

     1979

501. 三浦守, 志田純一, 樋口龍雄.
     "ユニバーサル形磁気演算モジュールに基づくディジタルフィ ルタの構成."
     電気学会論文誌, Vol. 99-C, No. 12, pp. 291--298, December 1979.
     
     
502. 樋口龍雄.
     "ディジタルフィルタへの応用."
     エレクトロニクスダイジェスト, No. 245, pp. 17--23, October 1979.
     
     
503. 樋口龍雄.
     "書評「論理回路ノート」."
     日経エレクトロニクス, No. 22, pp. 202--205, October 1979.
     
     
504. Michitaka Kameyama and Tatsuo Higuchi.
     "A new scaling algorithm in symmetric residue number system based on multiple-valued logic."
     Int. Symp. on Circuits and Systems, pp. 189--192, July 1979.
     
     
505. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Comments on discrete Fourier transform via Walsh transform."
     IEEE Trans, Acoustics, Speech and Signal Process., Vol. ASSP-27, No. 3, pp. 295--296, June 1979.
     
     
506. Michitaka Kameyama and Tatsuo Higuchi.
     "Design of multiple-valued arithmetic circuit based on residue number system and its application to digital filter."
     Int. Symp. on Multiple-Valued Logic, pp. 274--280, May 1979.
     
     
507. Michitaka Kameyama and Tatsuo Higuchi.
     "Synthesis of optimal T-gate networks in multiple-valued logic."
     Int. Symp. on Multiple-Valued Logic, pp. 190--195, May 1979.
     
     
508. 田所嘉昭, 古山健造, 樋口龍雄.
     "マイクロコンピュータに基づく磁気特性の測定システム."
     電気学会論文誌, Vol. 99-C, No. 4, pp. 79--86, April 1979.
     
     
509. Tatsuo Higuchi and H. Takeo.
     "A state-space approach for elimination of limit cycles in digital filters with arbitrary structures."
     IEEE Int. Conf. on Acoustics, Speech and Signal Process., pp. 355--358, April 1979.
     
     
510. 樋口龍雄, 小林孝次.
     "３値しきいゲートに基づくディジタルフィルタの構成."
     電子通信学会論文誌, Vol. J62-D, No. 2, pp. 49--56, February 1979.
     
     
511. 太田直久, 樋口龍雄.
     "状態方程式に基づくディジタルフィルタの構成理論."
     計測と制御, Vol. 18, No. 2, pp. 180--187, February 1979.
     
     
512. 太田直久, 樋口龍雄.
     "素子方程式に基づくディジタルフィルタの表現とその基礎的性質."
     電子通信学会論文誌, Vol. J62-A, No. 1, pp. 58--65, January 1979.
     
     
513. 笹尾勤, 向殿政男, 樋口龍雄.
     "第８回多値論理国際シンポジウム報告."
     電子通信学会誌, Vol. 62, No. 1, p. 100, January 1979.
     
     
514. 樋口龍雄.
     "多値論理システムの動向."
     電子通信学会誌, Vol. 62, No. 1, pp. 79--80, January 1979.
     
     

     1978

515. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Discrete fourier transform computation via the walsh transform."
     IEEE Trans. Acoustics, Speech and Signal Process., Vol. ASSP-26, No. 3, pp. 236--240, June 1978.
     
     
516. Tatsuo Higuchi and H. Hoshi.
     "Special-purpose ternary computer for digital filtering."
     Int. Symp. on Multiple-Valued Logic, pp. 47--54, May 1978.
     
     

     1977

517. Michitaka Kameyama and Tatsuo Higuchi.
     "Synthesis of multiple valued logic networks based on tree-type universal logic module."
     IEEE Trans. Computers, Vol. C-26, No. 12, pp. 1297--1302, December 1977.
     
     
518. Tatsuo Higuchi and Michitaka Kameyama.
     "Static-hazard-free T-gate for ternary memory element and its application to ternary counters."
     IEEE Trans. Computers, Vol. C-26, No. 12, pp. 1212--1221, December 1977.
     
     
519. 樋口龍雄.
     "書評「computer science and multiple valued logic」."
     日経エレクトロニクス, No. 170, pp. 172--177, October 1977.
     
     
520. 三浦守, 志田純一, 樋口龍雄.
     "磁心パルスカウンタを利用したパルス列信号処理用ユニバー サル形演算モジュール."
     電気学会論文誌, Vol. 97-C, No. 9, pp. 180--184, September 1977.
     
     
521. Mamoru Miura, Jun ichi Shida, Tatsuo Higuchi, and Takeshi Anayama.
     "New magnetic scaler used as universal arithmetic module for pulse-train signal processing."
     IEEE Trans. Magn., Vol. MAG-13, No. 5, pp. 1311--1313, September 1977.
     
     
522. Tatsuo Higuchi, T. Saito, and Akio Kanomata.
     "A microprocessor-based digital filter programmed in a block diagram language."
     IECI'77, The Major Conf. on Industrial, Microprocessors, Vol. IECI-24, No. 3, pp. 231--234, March 1977.
     
     
523. 樋口龍雄, 斉藤.
     "マイクロプロセッサを用いたプログラマブルディジタルフィ ルタ."
     電子通信学会論文誌, Vol. J60-D, No. 6, pp. 475--476, June 1977.
     
     
524. Mamoru Miura, Jun ichi Shida, Tatsuo Higuchi, and Takeshi Anayama.
     "New magnetic scaler used as universal arithmetic unit module for pulse train signal processing."
     Digest of the Intermag Conf., June 1977.
     
     
525. 亀山充隆, 樋口龍雄.
     "ユニバーサルロジックモジュールに基づく多値論理回路網 の合成."
     電子通信学会論文誌, Vol. J60-D, No. 5, pp. 355--362, May 1977.
     
     
526. 太田直久, 樋口龍雄.
     "低係数感度ディジタルフィルタの合成理論."
     電子通信学会論文誌, Vol. J60-A, No. 5, pp. 445--452, May 1977.
     
     
527. Tatsuo Higuchi and Koji Kobayashi.
     "Hardware implementation of digital filter based on ternary threshold gates."
     Int. Symp. on Multiple-Valued Logic, pp. 120--124, May 1977.
     
     
528. Michitaka Kameyama and Tatsuo Higuchi.
     "Practical state assignment for multiple-valued synchronous sequential circuits."
     Int. Symp. on Multiple-Valued Logic, pp. 70--76, May 1977.
     
     
529. Naohisa Ohta and Tatsuo Higuchi.
     "Estimation of error variance due to coefficient quantization of digital filters excited random signals."
     IEEE Int. Conf. on ASSP., pp. 615--618, May 1977.
     
     
530. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Discrete-time analog-signal-processing devices based on ic monostable multivibrators."
     IEEE Int. Conf. on ASSP., pp. 511--514, May 1977.
     
     
531. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "A new Fourier-transform algorithm using Walsh functions."
     IEEE Conf. on ASSP., pp. 348--351, May 1977.
     
     

     1976

532. Tatsuo Higuchi and Naohisa Ohta.
     "A simple hardware implementation of the stationary kalman filter."
     IEEE Circuits and Systems, Vol. 10, No. 6, pp. 2--6, December 1976.
     
     
533. 樋口龍雄, 石塚.
     "第６回多値論理国際シンポジウム報告."
     電子通信学会誌, Vol. 59, No. 10, pp. 1137--1138, October 1976.
     
     
534. 樋口龍雄, 古山健造.
     "磁気・３値Φ形フェイルセイフ論理回路."
     計測自動制御学会論文集, Vol. 12, No. 5, pp. 593--599, October 1976.
     
     
535. 鹿股昭雄, 樋口龍雄.
     "マイクロコンピュータを用いたオンライン実時間磁気トルク曲線分析装置."
     電子通信学会論文誌, Vol. J59-D, No. 8, pp. 583--585, August 1976.
     
     
536. 田所嘉昭, 樋口龍雄.
     "Walsh関数を利用したフーリエ変換のアルゴリズム."
     電子通信学会論文誌, Vol. J59-D, No. 7, pp. 507--509, July 1976.
     
     
537. 太田直久, 樋口龍雄.
     "ディジタルフィルタの係数感度解析に関する統一的考察."
     電子通信学会論文誌, Vol. J59-A, No. 6, pp. 473--480, June 1976.
     
     
538. Tatsuo Higuchi and Michitaka Kameyama.
     "Static-hazard-free T-gate for ternary memory element and its application to ternary counters."
     Int. Symp. on Multiple-Valued Logic, pp. 127--134, May 1976.
     
     
539. 亀山充隆, 樋口龍雄.
     "３値Tゲート回路網の合成理論."
     電子通信学会論文誌, Vol. J59-D, No. 3, pp. 204--211, March 1976.
     
     

     1975

540. 北橋, 樋口龍雄.
     "第５回多値論理国際シンポジウム報告."
     電子通信学会誌, Vol. 58, No. 12, pp. 1370--1371, November 1975.
     
     
541. 田所嘉昭, 樋口龍雄.
     "Walsh関数の磁気トルク曲線分析への応用."
     電子通信学会論文誌, Vol. 58-C, No. 8, pp. 490--491, August 1975.
     
     
542. 樋口龍雄, 田所嘉昭.
     "アナログ磁気記憶素子とその実時間信号処理装置への応用."
     電気学会論文誌, Vol. 95-C, No. 6, pp. 147--154, June 1975.
     
     
543. 樋口龍雄, 亀山充隆.
     "Tゲートに基づく３値論理系."
     電子通信学会論文誌, Vol. 58-D, No. 6, pp. 306--313, June 1975.
     
     
544. 田所嘉昭, 樋口龍雄.
     "IC単安定回路を利用したディジタルフィルタ."
     電子通信学会論文誌, Vol. 58-D, No. 5, pp. 287--288, May 1975.
     
     
545. 田所嘉昭, 樋口龍雄.
     "2次ディジタルフィルタの図式による設計法."
     電子通信学会論文誌, Vol. 58-A, No. 5, pp. 309--310, May 1975.
     
     
546. Tatsuo Higuchi and Michitaka Kameyama.
     "Synthesis of multiple-valued logic networks based on tree-type universal logic modules."
     Int. Symp. on Multiple-Valued Logic, pp. 121--130, May 1975.
     
     
547. Tatsuo Higuchi and Michitaka Kameyama.
     "Ternary logic system based on T-gate."
     Int. Symp. on Multiple-Valued Logic, pp. 290--304, May 1975.
     
     
548. Tatsuo Higuchi and Naohisa Ohta.
     "Real-time digital filter realized on the basis of state variable method and its application to simulator."
     IEEE Trans. Ind. Electron. and Control Instrum, Vol. IECI-22, No. 1, pp. 27--31, February 1975.
     
     
549. 田所嘉昭, 樋口龍雄.
     "ハイブリッド演算処理による簡易形実時間フーリエ分析器."
     電子通信学会誌, Vol. 58-C, No. 2, pp. 96--97, February 1975.
     
     

     1974

550. Yoshiaki Tadokoro, Tatsuo Higuchi and Takeshi Anayama.
     "Simple Real-Time Fourier Analyzer and Its Application to Analysis of Magnetic Torque Curves."
     IEEE Trans. on Magn., Vol. MAG-10, No. 4, pp. 1056--1059, December 1974.
     
     
551. Tatsuo Higuchi.
     "Magnetizing Frequency Dependence of Magnetic Domain Size in 50 % Nickel-Iron Alloy Deduced from a Statistical Analysis of Core Noise."
     Journal of Physics D: Appl. Phys., Vol. 7, No. 17, pp. 2379--2385, November 1974.
     
     
552. 樋口龍雄, 亀山充隆.
     "三値Tゲートの数学的構造."
     電子通信学会論文誌, Vol. 57-D, No. 9, pp. 555--556, September 1974.
     
     
553. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "A New Magnetic-Coupled Monostable Multivibrator with Variable and Wide Pulsewidth."
     IEEE Trans. on Ind. Electron. and Control Instrum, Vol. IECI-21, No. 3, pp. 185--191, August 1974.
     
     
554. 樋口龍雄, 亀山充隆.
     "Tゲートを用いた三値シフトレジスタ."
     電子通信学会論文誌, Vol. 57-D, No. 6, pp. 390--391, June 1974.
     
     
555. Yoshiaki Tadokoro, Tatsuo Higuchi, and Takeshi Anayama.
     "Simple Real-Time Fourier Analyzer and Its Application to Analysis of Magnetic Torque Curves."
     IEEE Intermag Conf., Vol. 36, No. 6, May 1974.
     
     
556. 田所嘉昭, 樋口龍雄, 穴山武.
     "実時間で動作する離散形フーリエ分析器とその応用."
     計測自動制御学会論文集, Vol. 10, No. 2, pp. 194--199, April 1974.
     
     
557. 田所嘉昭, 樋口龍雄, 穴山武.
     "変形単安定マルチバイブレータを利用した電圧ー時間変換器とその特性."
     電気学会論文誌, Vol. 94-C, No. 2, pp. 21--28, February 1974.
     
     
558. 樋口龍雄.
     "50 % Ni-Fe 磁心の雑音解析（磁心雑音の飽和起磁力依存性）."
     電気学会論文誌, Vol. 94-C, No. 1, pp. 15--20, January 1974.
     
     
559. 樋口龍雄, 太田直久.
     "状態方程式に基づいた実時間ディジタルフィルタの構成."
     電子通信学会論文誌, Vol. 57-D, No. 1, pp. 63--65, January 1974.
     
     

     1973

560. Yoshiaki Tadokoro and Tatsuo Higuchi.
     "Simple Magnetic Delay Unit with High Accuracy and Reliability for Digital Filters."
     IEEE Trans. on Ind. Electron and Control Instrum, Vol. IECI-20, No. 3, pp. 130--137, August 1973.
     
     
561. 田所嘉昭, 樋口龍雄, 穴山武.
     "磁気遅延素子を利用したディジタルフィルタ."
     計測自動制御学会論文集, Vol. 9, No. 3, pp. 277--282, June 1973.
     
     
562. 樋口龍雄, 米畑 譲, 穴山武.
     "計測制御用４脚磁心プッシュプル磁気増幅器の増幅限界の 検討."
     電気学会論文誌, Vol. 93-C, No. 5, pp. 101--108, May 1973.
     
     
563. 樋口龍雄, 亀山充隆.
     "Tゲートを用いた三値論理回路."
     電子通信学会論文誌, Vol. 56-D, No. 4, pp. 270--271, April 1973.
     
     

     1972

564. 樋口龍雄.
     "単一磁心プッシュプル磁気増幅器（Darling回路）の一設計法."
     計測自動制御学会論文集, Vol. 8, No. 6, pp. 704--708, December 1972.
     
     
565. Tatsuo Higuchi.
     "Low Drift Push-Pull Self-Saturating Magnetic Amplifier Using a Single Core."
     IEEE Trans. on Ind. Electron and Control Instrum, Vol. IECI-19, No. 1, pp. 6--12, February 1972.
     
     

     1971

566. Tatsuo Higuchi.
     "Estimation of Dynamic Domain Size Variation in 50 % Nickel-Iron Alloy by Analyzing of Core Noise."
     Z. Angew. Physik., 31 Band, 5.-6. Heft, S. 327--331, December 1971.
     
     
567. 樋口龍雄.
     "磁気増幅器雑音に関する確率論的考察."
     電気学会雑誌, Vol. 91, No. 9, pp. 1689--1697, September 1971.
     
     
568. Tatsuo Higuchi.
     "Experimental Study of Core Noise in Various Ferromagnetic Materials."
     IEEE Trans. on Magn., Vol. MAG-7, No. 2, pp. 316--319, June 1971.
     
     
569. Tatsuo Higuchi and Takeshi Anayama.
     "Effect of the Magnitude of Maximum Magnetizing Force on the Core Noise Caused by Fluctuations of Dynamic Minor Loops."
     IEEE Intermag Conf., 15.3, Denver, 1971 ; also IEEE Trans. on Magn., Vol. MAG-7, No. 3, pp. 548--549, April 1971.
     
     
570. 樋口龍雄.
     "単一磁心プッシュプル磁気増幅器（Darling回路）の増幅可能レベルの限界."
     計測自動制御学会論文集, Vol. 7, No. 2, pp. 113--121, April 1971.
     
     
571. Tatsuo Higuchi and Takeshi Anayama.
     "Core Noise in 50 % Ni-Fe by Considering Nonindepemdent but Correlated Pulse Trains."
     Z. Angew. Physik., 30. Band, 5. Heft, S. 335--338, March 1971.
     
     

     1970

572. Tatsuo Higuchi.
     "A Statistical Model of Core Noise in Half-Wave Push-Pull Magnetic Amplifiers."
     IEEE Trans. on Magn., Vol. MAG-6, No. 4, pp. 847--849, December 1970.
     
     
573. Tatsuo Higuchi.
     "Low Drift Push-Pull Self-Saturating Magnetic Amplifier Using a Single Core."
     IEEE Intermag Conf., Vol. MAG-6, No. 3, pp. 655--656, April 1970.
     
     

     1969

574. Tatsuo Higuchi and Tadashi Kikuchi.
     "A Remark on a Stochastic Model of Core Noise for Magnetic Amplifier."
     IEEE Intermag Conf., Vol. MAG-5, No. 3, pp. 357--358, April 1969.
     
     
575. 樋口龍雄, 菊地正.
     "磁気増幅器の零点変動に関する実験的考察."
     電気学会雑誌, Vol. 89-2, No. 965, pp. 331--340, February 1969.
     
     

     1968

576. 樋口龍雄, 菊地正.
     "単一磁心プッシュプル磁気増幅器（Darling回路）の解析."
     計測自動制御学会論文集, Vol. 4, No. 4, pp. 397--404, December 1968.