List of Papers and Proceedings


Papers

  1. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Synthesis of Arithmetic Circuit Structures",
    Artifical Intelligence Review, Kluwer Academic Publishers, Vol. 20, Nos. 3-4, pp. 199--232, December 2003.

  2. M. Natsui, T. Aoki and T. Higuchi,
    "Parallel Evolutionary Graph Generation with Terminal-Color Constraint and Its Application to Current-Mode Logic Circuit Design",
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E85-A, No. 9, pp. 2061--2071, September 2002.

  3. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary graph generation system with transmigration capability and its application to arithmetic circuit synthesis",
    IEE Proceedings -Circuits, Devices and Systems, Vol. 149, No. 2, pp. 97--104, April 2002.

  4. D. Chen, T. Aoki, N. Homma, T. Terasaki and T. Higuchi,
    "Graph-Based Evolutionary Design of Arithmetic Circuits",
    IEEE Transactions on Evolutionary Computation, Vol. 6, No. 1, pp. 86--100, February 2002.

  5. D. Chen, T. Aoki, N. Homma and T. Higuchi,
    "Parallel Evolutionary Design of Constant-Coefficient Multipliers",
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E85-A, No. 2, pp. 508--512, February 2002.

  6. D. Chen, T. Aoki, N. Homma and T. Higuchi,
    "Pragmatic method for the design of fast constant-coefficient combinational multipliers",
    IEE Proceedings -Computers and Digital Techniques, Vol. 148, No. 6, pp. 196--206, November 2001.

  7. M. Natsui, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation System with Terminal-Color Constraint -An Application to Multiple-Valued Logic Circuit Synthesis-",
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 11, pp. 2808--2810, November 2001.

  8. M. Natsui, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation with Terminal-Color Constraint for Heterogeneous Circuit Synthesis",
    Electronics Letters, Vol. 37, No. 13, pp. 808--810, June 2001.

  9. T. Terasaki, T. Aoki and T. Higuchi,
    "Evolutionary Synthesis of Bit-serial Arithmetic Circuits",
    IPSJ Journal, Vol. 42, No. 4, pp. 975--982, April 2001.

  10. D. Chen, T. Aoki, N. Homma and T. Higuchi,
    "Evolutionary design for high-speed constant-coefficient multipliers",
    Electronics Letters, Vol. 37, No. 4, pp. 256--258, February 2001.

  11. N. Homma, T. Aoki, and T. Higuchi,
    "Evolutionary Synthesis of Fast Constant-Coefficient Multipliers",
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E83-A, No. 9, pp. 1767--1777, September 2000.

  12. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary graph generation system with symbolic verification for arithmetic circuit design",
    Electronics Letters, Vol. 36, No. 11, pp. 937--939, May 2000.

  13. T. Aoki, N. Homma and T. Higuchi,
    "Evolutionary Design of Arithmetic Circuits",
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E82-A, 5, pp. 798--806, May 1999.


Proceedings

  1. M. Natsui, N. Homma, T. Aoki, and T. Higuchi,
    "Topology-Oriented Design of Current Mirrors Using Evolutionary Graph Generation System",
    Proceedings of The 12th Workshop on Synthesis And System Integration of Mixed Information technologies, pp. 78--84, October 2004.
  2. M. Natsui, N. Homma, T. Aoki, and T. Higuchi,
    "Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation",
    Parallel Problem Solving from Nature - PPSN VIII, Lecture Notes in Computer Science 3242, Springer-Verlag, pp. 342--349, September 2004.

  3. M. Natsui, N. Homma, T. Aoki, and T. Higuchi,
    "Evolutionary Graph Generation System with Transmigration Capability and Its Application to Current Mirror Circuit Synthesis",
    Proceedings of The 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 8A2L-3-1--8A2L-3-4, July 2004.

  4. N. Homma, M. Natsui, T. Aoki and T. Higuchi,
    "VLSI Circuit Design Using an Object-Oriented Framework of Evolutionary Graph Generation System."
    Proceedings of the 2003 Congress on Evolutionary Computation, pp. 115--122, December 2003.
  5. M. Natsui, N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation System and Its Application to MOS Current Mirror Synthesis,"
    Proceedings of 2003 International Symposium on Intelligent Signal Processing and Communication Syst ems, pp. 747--752, December 2003.

  6. N. Homma, T. Aoki, M. Motegi and T. Higuchi,
    "A Framework of Evolutionary Graph Generation System and Its Application to Circuit Synthesis",
    Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, pp. V-201--V-204, May 2003.

  7. N. Homma, T. Aoki, and T. Higuchi,
    "Evolutionary Synthesis of Circuit Structures",
    Proceedings of 2002 International Symposium on New Paradigm VLSI Computing, pp. 48--51, December 2002.

  8. M. Motegi, N. Homma, T. Aoki, and T. Higuchi,
    "Evolutionary Graph Generation System and Its Application to Bit-Serial Arithmetic Circuit Synthesis",
    Parallel Problem Solving from Nature - PPSN VII, Lecture Notes in Computer Science 2439, Springer-Verlag, pp. 831--840, September 2002.

  9. M. Natsui, T. Aoki and T. Higuchi,
    "Parallel Evolutionary Graph Generation on a PC Cluster and Its Application to Multiple-Valued Circuit Synthesis",
    Proceedings of the 32nd IEEE International Symposium on Multiple-Valued LogicĄ¤pp. 96--102, May 2002.

  10. N. Homma, T. Aoki and T. Higuchi,
    "Graph-based Individual Representation for Evolutionary Synthesis of Arithmetic Circuits",
    Proceedings of the 2002 Congress on Evolutionary Computation (CEC'02) pp. 1492--1497, May 2002.

  11. D. Chen, T. Aoki, N. Homma and T. Higuchi,
    "Design of Constant-Coefficient Multipliers",
    Proceedings of 2001 4th International Conference on ASIC, pp. 416--419, October 2001.

  12. D. Chen, T. Aoki, N. Homma and T. Higuchi,
    "Distributed Evolutionary Design of Constant-Coefficient Multipliers",
    Proceedings of the 8th IEEE International Conference on Electronics, Circuits and Systems, pp. 249--252, September 2001.

  13. M. Natsui, T. Aoki and T. Higuchi,
    "Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation",
    Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic, pp. 253--258, May 2001.

  14. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation System with Transmigration Capability for Arithmetic Circuit Design",
    Proceedings of the 2001 IEEE International Symposium on Circuits and Systems, pp. 171--174, May 2001.

  15. T. Terasaki, T. Aoki and T. Higuchi,
    "Evolutionary Synthesis of Sequential Arithmetic Circuits",
    Proceedings of International Symposium on Intelligent Signal Processing and Communication Systems, Vol. II, pp. 1067--1072, November 2000.

  16. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Generation of Constant-Coefficient Multipliers",
    Proceedings of International Symposium on Intelligent Signal Processing and Communication Systems, pp. 481--484, December 1999.

  17. N. Homma, T. Aoki and T. Higuchi,
    "A New Evolutionary Approach for Synthesizing Circuit Structures",
    International Symposium on Nonlinear Theory and Its Applications (NOLTA), Vol. 1, pp. 239--242, November 1999.

  18. N. Homma, T. Aoki and T. Higuchi,
    "Evolutionary Graph Generation System for Arithmetic Circuit Design",
    Proceedings of International Symposium on Future of Intellectual Integrated Electronics, pp. 355--364, March 1999.

  19. N. Homma, T. Aoki and T. Higuchi,
    "Design of Arithmetic Circuits Based on Evolutionary Graph Generation",
    Proceedings of the Workshop on Synthesis And System Integration of Mixed Technologies, No. 1-3, pp. 31--38, October 1998.